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* plat_timer_setup, mips_timer_ack, etc.
@ 2007-10-16 15:52 Atsushi Nemoto
  2007-10-16 16:36 ` Ralf Baechle
  0 siblings, 1 reply; 7+ messages in thread
From: Atsushi Nemoto @ 2007-10-16 15:52 UTC (permalink / raw)
  To: linux-mips

With recent clockevent conversion, for typical r4k counter timer,
setup_irq() for the timer interrupt is called three times.

1. from time_init()  (#ifdef CONFIG_IRQ_CPU block)
2. from plat_timer_setup()  (arch/tx4927/common/tx4927_setup.c, for example)
3. from mips_clockevent_init()

Which one should remain?

Also I found mips_timer_ack and cycles_per_jiffy are not used now.
Can we remove them entirely?

Furthermore, I wonder how to disable mips_clockevent_device even if
the CPU has r4k counter.  For example, pnx8550 has the r4k counter but
needs special mips_timer_ack and clocksource_mips.read routine.  I
suppose current time code is broken for such platforms.

Any suggestions?
---
Atsushi Nemoto

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-16 15:52 plat_timer_setup, mips_timer_ack, etc Atsushi Nemoto
@ 2007-10-16 16:36 ` Ralf Baechle
  2007-10-16 17:01   ` Atsushi Nemoto
  0 siblings, 1 reply; 7+ messages in thread
From: Ralf Baechle @ 2007-10-16 16:36 UTC (permalink / raw)
  To: Atsushi Nemoto; +Cc: linux-mips

On Wed, Oct 17, 2007 at 12:52:11AM +0900, Atsushi Nemoto wrote:

> With recent clockevent conversion, for typical r4k counter timer,
> setup_irq() for the timer interrupt is called three times.
> 
> 1. from time_init()  (#ifdef CONFIG_IRQ_CPU block)
> 2. from plat_timer_setup()  (arch/tx4927/common/tx4927_setup.c, for example)
> 3. from mips_clockevent_init()
> 
> Which one should remain?

I would suggest the one near where the clockevent device is registered.

> Also I found mips_timer_ack and cycles_per_jiffy are not used now.
> Can we remove them entirely?

I think so.  Each clockevent device should rather try to be independent
of others.  What made the old timer code such a mess is that it was
desparately trying to share resources giving everybody plenty of rope ...


> Furthermore, I wonder how to disable mips_clockevent_device even if
> the CPU has r4k counter.  For example, pnx8550 has the r4k counter but
> needs special mips_timer_ack and clocksource_mips.read routine.  I
> suppose current time code is broken for such platforms.

PNX and the old revisions of the R4000 which have a bug where the
compare interrupt can be lost if the counter is read just when it has
the same value as the compare register.

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-16 16:36 ` Ralf Baechle
@ 2007-10-16 17:01   ` Atsushi Nemoto
  2007-10-17 16:28     ` Ralf Baechle
  0 siblings, 1 reply; 7+ messages in thread
From: Atsushi Nemoto @ 2007-10-16 17:01 UTC (permalink / raw)
  To: ralf; +Cc: linux-mips

On Tue, 16 Oct 2007 17:36:10 +0100, Ralf Baechle <ralf@linux-mips.org> wrote:
> > Also I found mips_timer_ack and cycles_per_jiffy are not used now.
> > Can we remove them entirely?
> 
> I think so.  Each clockevent device should rather try to be independent
> of others.  What made the old timer code such a mess is that it was
> desparately trying to share resources giving everybody plenty of rope ...

So all mips_timer_ack users should implement its own clockevent
device, right?

$ git-grep mips_timer_ack arch/mips
arch/mips/dec/time.c:   mips_timer_ack = dec_timer_ack;
arch/mips/jmr3927/rbhma3100/setup.c:    mips_timer_ack = jmr3927_timer_ack;
arch/mips/philips/pnx8550/common/time.c:        mips_timer_ack = timer_ack;
arch/mips/sni/time.c:        mips_timer_ack = sni_a20r_timer_ack;

---
Atsushi Nemoto

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-16 17:01   ` Atsushi Nemoto
@ 2007-10-17 16:28     ` Ralf Baechle
  2007-10-17 16:34       ` Sergei Shtylyov
  0 siblings, 1 reply; 7+ messages in thread
From: Ralf Baechle @ 2007-10-17 16:28 UTC (permalink / raw)
  To: Atsushi Nemoto; +Cc: linux-mips

On Wed, Oct 17, 2007 at 02:01:13AM +0900, Atsushi Nemoto wrote:

> On Tue, 16 Oct 2007 17:36:10 +0100, Ralf Baechle <ralf@linux-mips.org> wrote:
> > > Also I found mips_timer_ack and cycles_per_jiffy are not used now.
> > > Can we remove them entirely?
> > 
> > I think so.  Each clockevent device should rather try to be independent
> > of others.  What made the old timer code such a mess is that it was
> > desparately trying to share resources giving everybody plenty of rope ...
> 
> So all mips_timer_ack users should implement its own clockevent
> device, right?

Yes.

> $ git-grep mips_timer_ack arch/mips
> arch/mips/dec/time.c:   mips_timer_ack = dec_timer_ack;
> arch/mips/jmr3927/rbhma3100/setup.c:    mips_timer_ack = jmr3927_timer_ack;
> arch/mips/philips/pnx8550/common/time.c:        mips_timer_ack = timer_ack;
> arch/mips/sni/time.c:        mips_timer_ack = sni_a20r_timer_ack;

Not too many then I guess ;-)

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-17 16:28     ` Ralf Baechle
@ 2007-10-17 16:34       ` Sergei Shtylyov
  2007-10-17 16:58         ` Ralf Baechle
  2007-10-17 17:40         ` Ralf Baechle
  0 siblings, 2 replies; 7+ messages in thread
From: Sergei Shtylyov @ 2007-10-17 16:34 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: Atsushi Nemoto, linux-mips

Hello.

Ralf Baechle wrote:

>>$ git-grep mips_timer_ack arch/mips
>>arch/mips/dec/time.c:   mips_timer_ack = dec_timer_ack;
>>arch/mips/jmr3927/rbhma3100/setup.c:    mips_timer_ack = jmr3927_timer_ack;

    TX3927 has three channel timer of which only channel 0 is used to 
implement a clocksource -- however, clocksource code whould also need to be 
changed since it's now jiffy-based and HRT doesn't tolerate this -- of course, 
if anybody still cared about this boards

>>arch/mips/philips/pnx8550/common/time.c:        mips_timer_ack = timer_ack;

    Here we have a case of a vendor abusing the count/compare register and 
also adding 3 more of them. One pair can be used for clockevents, the other 
for clocksource (its compare reg. being programmed to all ones).

WBR, Sergei

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-17 16:34       ` Sergei Shtylyov
@ 2007-10-17 16:58         ` Ralf Baechle
  2007-10-17 17:40         ` Ralf Baechle
  1 sibling, 0 replies; 7+ messages in thread
From: Ralf Baechle @ 2007-10-17 16:58 UTC (permalink / raw)
  To: Sergei Shtylyov; +Cc: Atsushi Nemoto, linux-mips

On Wed, Oct 17, 2007 at 08:34:52PM +0400, Sergei Shtylyov wrote:

> Ralf Baechle wrote:
> 
> >>$ git-grep mips_timer_ack arch/mips
> >>arch/mips/dec/time.c:   mips_timer_ack = dec_timer_ack;
> >>arch/mips/jmr3927/rbhma3100/setup.c:    mips_timer_ack = 
> >>jmr3927_timer_ack;
> 
>    TX3927 has three channel timer of which only channel 0 is used to 
> implement a clocksource -- however, clocksource code whould also need to be 
> changed since it's now jiffy-based and HRT doesn't tolerate this -- of 
> course, if anybody still cared about this boards

Well, getting rid of the code where there are no users left is always the
other solution.

> >>arch/mips/philips/pnx8550/common/time.c:        mips_timer_ack = 
> >>timer_ack;
> 
>    Here we have a case of a vendor abusing the count/compare register and 
> also adding 3 more of them. One pair can be used for clockevents, the other 
> for clocksource (its compare reg. being programmed to all ones).

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: plat_timer_setup, mips_timer_ack, etc.
  2007-10-17 16:34       ` Sergei Shtylyov
  2007-10-17 16:58         ` Ralf Baechle
@ 2007-10-17 17:40         ` Ralf Baechle
  1 sibling, 0 replies; 7+ messages in thread
From: Ralf Baechle @ 2007-10-17 17:40 UTC (permalink / raw)
  To: Sergei Shtylyov; +Cc: Atsushi Nemoto, linux-mips

On Wed, Oct 17, 2007 at 08:34:52PM +0400, Sergei Shtylyov wrote:

> >>$ git-grep mips_timer_ack arch/mips
> >>arch/mips/dec/time.c:   mips_timer_ack = dec_timer_ack;
> >>arch/mips/jmr3927/rbhma3100/setup.c:    mips_timer_ack = 
> >>jmr3927_timer_ack;
> 
>    TX3927 has three channel timer of which only channel 0 is used to 
> implement a clocksource -- however, clocksource code whould also need to be 
> changed since it's now jiffy-based and HRT doesn't tolerate this -- of 
> course, if anybody still cared about this boards
> 
> >>arch/mips/philips/pnx8550/common/time.c:        mips_timer_ack = 
> >>timer_ack;
> 
>    Here we have a case of a vendor abusing the count/compare register and 
> also adding 3 more of them. One pair can be used for clockevents, the other 
> for clocksource (its compare reg. being programmed to all ones).

Well, the TX3900 series is a bit of a frankenprocessor series.  Like take
32-bits from here, a limb from the R3000 and TLB from that other processor
and at the end shock it all well - at TTL levels that is ;-)  So it's not
quite obvious what to expect from that beast.

My question was mostly about the jmr3927 build failing with an undefined
reference to MIPS_CPU_IRQ_BASE.  For most other systems failing with the
same issue it made sense to glue that by converting the platform to
irq_cpu.  But if no device including the cp0 compare interrupt is directly
wired to the cp0 interrupt controller then enabling that doesn't make too
much sense.  So I guess jmr3927 and a hand full of other systems want a
different fix.

  Ralf

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2007-10-17 17:40 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-10-16 15:52 plat_timer_setup, mips_timer_ack, etc Atsushi Nemoto
2007-10-16 16:36 ` Ralf Baechle
2007-10-16 17:01   ` Atsushi Nemoto
2007-10-17 16:28     ` Ralf Baechle
2007-10-17 16:34       ` Sergei Shtylyov
2007-10-17 16:58         ` Ralf Baechle
2007-10-17 17:40         ` Ralf Baechle

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