Re: [PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[James Hogan <james.hogan@imgtec.com>]

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Hi Paul,

On Fri, Feb 17, 2017 at 10:29:11AM -0800, Paul Burton wrote:
> > This results in userland FP breakage as CP0_Status.FR is read-only 1
> > since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
> > emulate FR=0.
> 
> Perhaps it would be worth clarifying that what it breaks is FPU emulation or 
> pre-r6 FP code running atop MIPS32r6 kernels. Since FR=1 context switching 
> should work fine for r6 user code, and it would only be impacted if it 
> requires emulation for some reason (which is probably why we haven't hit this 
> earlier in our CI testing).

Thanks Paul, it does indeed invoke the FPU emulator as it fails to set
FR=0. I'll update that paragraph to say this:
> This results in userland FP breakage as CP0_Status.FR is read-only 1
> since r6 (when an FPU is present) so __enable_fpu() will fail to clear
> FR. This causes the FPU emulator to get used which will incorrectly
> emulate 32-bit FPU registers.


> Besides possibly clarifying the commit message above this looks good to me so:
> 
>     Reviewed-by: Paul Burton <paul.burton@imgtec.com>

Thanks
James

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