[PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[James Hogan]

When a 32-bit kernel is configured to support MIPS64r6 (CPU_MIPS64_R6),
MIPS_O32_FP64_SUPPORT won't be selected as it should be because
MIPS32_O32 is disabled (o32 is already the default ABI available on
32-bit kernels).

This results in userland FP breakage as CP0_Status.FR is read-only 1
since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
emulate FR=0.

Force o32 fp64 support in this case by also selecting
MIPS_O32_FP64_SUPPORT from CPU_MIPS64_R6 if 32BIT.

Fixes: 4e9d324d4288 ("MIPS: Require O32 FP64 support for MIPS64 with O32 compat")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.0.x-
---
 arch/mips/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b969522feb97..e2890002d6d1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1531,7 +1531,7 @@ config CPU_MIPS64_R6
 	select CPU_SUPPORTS_HIGHMEM
 	select CPU_SUPPORTS_MSA
 	select GENERIC_CSUM
-	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
+	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
 	select HAVE_KVM
 	help
 	  Choose this option to build a kernel for release 6 or later of the
-- 
git-series 0.8.10

[PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[James Hogan]

When a 32-bit kernel is configured to support MIPS64r6 (CPU_MIPS64_R6),
MIPS_O32_FP64_SUPPORT won't be selected as it should be because
MIPS32_O32 is disabled (o32 is already the default ABI available on
32-bit kernels).

This results in userland FP breakage as CP0_Status.FR is read-only 1
since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
emulate FR=0.

Force o32 fp64 support in this case by also selecting
MIPS_O32_FP64_SUPPORT from CPU_MIPS64_R6 if 32BIT.

Fixes: 4e9d324d4288 ("MIPS: Require O32 FP64 support for MIPS64 with O32 compat")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.0.x-
---
 arch/mips/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b969522feb97..e2890002d6d1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1531,7 +1531,7 @@ config CPU_MIPS64_R6
 	select CPU_SUPPORTS_HIGHMEM
 	select CPU_SUPPORTS_MSA
 	select GENERIC_CSUM
-	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
+	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
 	select HAVE_KVM
 	help
 	  Choose this option to build a kernel for release 6 or later of the
-- 
git-series 0.8.10

Re: [PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[Paul Burton]

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Hi James,

On Thursday, 16 February 2017 04:39:01 PST James Hogan wrote:
> When a 32-bit kernel is configured to support MIPS64r6 (CPU_MIPS64_R6),
> MIPS_O32_FP64_SUPPORT won't be selected as it should be because
> MIPS32_O32 is disabled (o32 is already the default ABI available on
> 32-bit kernels).

Nice catch!

> This results in userland FP breakage as CP0_Status.FR is read-only 1
> since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
> emulate FR=0.

Perhaps it would be worth clarifying that what it breaks is FPU emulation or 
pre-r6 FP code running atop MIPS32r6 kernels. Since FR=1 context switching 
should work fine for r6 user code, and it would only be impacted if it 
requires emulation for some reason (which is probably why we haven't hit this 
earlier in our CI testing).

> Force o32 fp64 support in this case by also selecting
> MIPS_O32_FP64_SUPPORT from CPU_MIPS64_R6 if 32BIT.
> 
> Fixes: 4e9d324d4288 ("MIPS: Require O32 FP64 support for MIPS64 with O32
> compat") Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: linux-mips@linux-mips.org
> Cc: <stable@vger.kernel.org> # 4.0.x-
> ---
>  arch/mips/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index b969522feb97..e2890002d6d1 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1531,7 +1531,7 @@ config CPU_MIPS64_R6
>  	select CPU_SUPPORTS_HIGHMEM
>  	select CPU_SUPPORTS_MSA
>  	select GENERIC_CSUM
> -	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
> +	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>  	select HAVE_KVM
>  	help
>  	  Choose this option to build a kernel for release 6 or later of the

Besides possibly clarifying the commit message above this looks good to me so:

    Reviewed-by: Paul Burton <paul.burton@imgtec.com>

Thanks,
    Paul

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Re: [PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[Paul Burton]

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Hi James,

On Thursday, 16 February 2017 04:39:01 PST James Hogan wrote:
> When a 32-bit kernel is configured to support MIPS64r6 (CPU_MIPS64_R6),
> MIPS_O32_FP64_SUPPORT won't be selected as it should be because
> MIPS32_O32 is disabled (o32 is already the default ABI available on
> 32-bit kernels).

Nice catch!

> This results in userland FP breakage as CP0_Status.FR is read-only 1
> since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
> emulate FR=0.

Perhaps it would be worth clarifying that what it breaks is FPU emulation or 
pre-r6 FP code running atop MIPS32r6 kernels. Since FR=1 context switching 
should work fine for r6 user code, and it would only be impacted if it 
requires emulation for some reason (which is probably why we haven't hit this 
earlier in our CI testing).

> Force o32 fp64 support in this case by also selecting
> MIPS_O32_FP64_SUPPORT from CPU_MIPS64_R6 if 32BIT.
> 
> Fixes: 4e9d324d4288 ("MIPS: Require O32 FP64 support for MIPS64 with O32
> compat") Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Paul Burton <paul.burton@imgtec.com>
> Cc: linux-mips@linux-mips.org
> Cc: <stable@vger.kernel.org> # 4.0.x-
> ---
>  arch/mips/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index b969522feb97..e2890002d6d1 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -1531,7 +1531,7 @@ config CPU_MIPS64_R6
>  	select CPU_SUPPORTS_HIGHMEM
>  	select CPU_SUPPORTS_MSA
>  	select GENERIC_CSUM
> -	select MIPS_O32_FP64_SUPPORT if MIPS32_O32
> +	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>  	select HAVE_KVM
>  	help
>  	  Choose this option to build a kernel for release 6 or later of the

Besides possibly clarifying the commit message above this looks good to me so:

    Reviewed-by: Paul Burton <paul.burton@imgtec.com>

Thanks,
    Paul

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Re: [PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[James Hogan]

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Hi Paul,

On Fri, Feb 17, 2017 at 10:29:11AM -0800, Paul Burton wrote:
> > This results in userland FP breakage as CP0_Status.FR is read-only 1
> > since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
> > emulate FR=0.
> 
> Perhaps it would be worth clarifying that what it breaks is FPU emulation or 
> pre-r6 FP code running atop MIPS32r6 kernels. Since FR=1 context switching 
> should work fine for r6 user code, and it would only be impacted if it 
> requires emulation for some reason (which is probably why we haven't hit this 
> earlier in our CI testing).

Thanks Paul, it does indeed invoke the FPU emulator as it fails to set
FR=0. I'll update that paragraph to say this:
> This results in userland FP breakage as CP0_Status.FR is read-only 1
> since r6 (when an FPU is present) so __enable_fpu() will fail to clear
> FR. This causes the FPU emulator to get used which will incorrectly
> emulate 32-bit FPU registers.


> Besides possibly clarifying the commit message above this looks good to me so:
> 
>     Reviewed-by: Paul Burton <paul.burton@imgtec.com>

Thanks
James

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Re: [PATCH] MIPS: Force o32 fp64 support on 32bit MIPS64r6 kernels

[James Hogan]

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Hi Paul,

On Fri, Feb 17, 2017 at 10:29:11AM -0800, Paul Burton wrote:
> > This results in userland FP breakage as CP0_Status.FR is read-only 1
> > since r6 (when an FPU is present) but CP0_Config5.FRE won't be set to
> > emulate FR=0.
> 
> Perhaps it would be worth clarifying that what it breaks is FPU emulation or 
> pre-r6 FP code running atop MIPS32r6 kernels. Since FR=1 context switching 
> should work fine for r6 user code, and it would only be impacted if it 
> requires emulation for some reason (which is probably why we haven't hit this 
> earlier in our CI testing).

Thanks Paul, it does indeed invoke the FPU emulator as it fails to set
FR=0. I'll update that paragraph to say this:
> This results in userland FP breakage as CP0_Status.FR is read-only 1
> since r6 (when an FPU is present) so __enable_fpu() will fail to clear
> FR. This causes the FPU emulator to get used which will incorrectly
> emulate 32-bit FPU registers.


> Besides possibly clarifying the commit message above this looks good to me so:
> 
>     Reviewed-by: Paul Burton <paul.burton@imgtec.com>

Thanks
James

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