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From: James Hogan <james.hogan@mips.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>,
	Maarten ter Huurne <maarten@treewalker.org>,
	Paul Burton <paul.burton@mips.com>,
	<linux-kernel@vger.kernel.org>, <linux-mips@linux-mips.org>
Subject: Re: [PATCH v6 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers
Date: Wed, 10 Jan 2018 23:20:45 +0000	[thread overview]
Message-ID: <20180110232045.GX27409@jhogan-linux.mipstec.com> (raw)
In-Reply-To: <20180105182513.16248-14-paul@crapouillou.net>

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On Fri, Jan 05, 2018 at 07:25:11PM +0100, Paul Cercueil wrote:
> From: Maarten ter Huurne <maarten@treewalker.org>
> 
> We have seen MMC DMA transfers read corrupted data from SDRAM when
> a burst interval ends at physical address 0x10000000. To avoid this
> problem, we remove the final page of low memory from the memory map.
> 
> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
> ---
>  arch/mips/jz4740/setup.c | 24 ++++++++++++++++++++++++
>  arch/mips/kernel/setup.c |  8 ++++++++
>  2 files changed, 32 insertions(+)
> 
>  v2: No change
>  v3: No change
>  v4: No change
>  v5: No change
>  v6: No change
> 
> diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
> index cd89536fbba1..18c57c4bf47e 100644
> --- a/arch/mips/jz4740/setup.c
> +++ b/arch/mips/jz4740/setup.c
> @@ -22,6 +22,7 @@
>  #include <linux/of_fdt.h>
>  
>  #include <asm/bootinfo.h>
> +#include <asm/page.h>
>  #include <asm/prom.h>
>  
>  #include <asm/mach-jz4740/base.h>
> @@ -103,3 +104,26 @@ void __init arch_init_irq(void)
>  {
>  	irqchip_init();
>  }
> +
> +/*
> + * We have seen MMC DMA transfers read corrupted data from SDRAM when a burst
> + * interval ends at physical address 0x10000000. To avoid this problem, we
> + * remove the final page of low memory from the memory map.
> + */
> +void __init jz4770_reserve_unsafe_for_dma(void)
> +{
> +	int i;
> +
> +	for (i = 0; i < boot_mem_map.nr_map; i++) {
> +		struct boot_mem_map_entry *entry = boot_mem_map.map + i;
> +
> +		if (entry->type != BOOT_MEM_RAM)
> +			continue;
> +
> +		if (entry->addr + entry->size != 0x10000000)
> +			continue;
> +
> +		entry->size -= PAGE_SIZE;
> +		break;
> +	}
> +}
> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
> index 85bc601e9a0d..5a2c20145aee 100644
> --- a/arch/mips/kernel/setup.c
> +++ b/arch/mips/kernel/setup.c
> @@ -879,6 +879,14 @@ static void __init arch_mem_init(char **cmdline_p)
>  
>  	parse_early_param();
>  
> +#ifdef CONFIG_MACH_JZ4770
> +	if (current_cpu_type() == CPU_JZRISC &&
> +				mips_machtype == MACH_INGENIC_JZ4770) {
> +		extern void __init jz4770_reserve_unsafe_for_dma(void);
> +		jz4770_reserve_unsafe_for_dma();
> +	}
> +#endif

Hmm, a little bit ugly. I'm guessing the plat_mem_setup() callback is
too early since mem= parameters won't have been taken into account yet
from parse_early_param().

Is /memreserve/ in FDT of any value here or is it all too late due to
old DTs?

Cheers
James

> +
>  	if (usermem) {
>  		pr_info("User-defined physical RAM map:\n");
>  		print_memory_map();
> -- 
> 2.11.0
> 
> 

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WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@mips.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>,
	Maarten ter Huurne <maarten@treewalker.org>,
	Paul Burton <paul.burton@mips.com>,
	linux-kernel@vger.kernel.org, linux-mips@linux-mips.org
Subject: Re: [PATCH v6 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers
Date: Wed, 10 Jan 2018 23:20:45 +0000	[thread overview]
Message-ID: <20180110232045.GX27409@jhogan-linux.mipstec.com> (raw)
Message-ID: <20180110232045.ShvcCRT6erJRVjlFCsQ5a-p27Eb2ZXP18AhsMMK_Iq4@z> (raw)
In-Reply-To: <20180105182513.16248-14-paul@crapouillou.net>

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On Fri, Jan 05, 2018 at 07:25:11PM +0100, Paul Cercueil wrote:
> From: Maarten ter Huurne <maarten@treewalker.org>
> 
> We have seen MMC DMA transfers read corrupted data from SDRAM when
> a burst interval ends at physical address 0x10000000. To avoid this
> problem, we remove the final page of low memory from the memory map.
> 
> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
> ---
>  arch/mips/jz4740/setup.c | 24 ++++++++++++++++++++++++
>  arch/mips/kernel/setup.c |  8 ++++++++
>  2 files changed, 32 insertions(+)
> 
>  v2: No change
>  v3: No change
>  v4: No change
>  v5: No change
>  v6: No change
> 
> diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
> index cd89536fbba1..18c57c4bf47e 100644
> --- a/arch/mips/jz4740/setup.c
> +++ b/arch/mips/jz4740/setup.c
> @@ -22,6 +22,7 @@
>  #include <linux/of_fdt.h>
>  
>  #include <asm/bootinfo.h>
> +#include <asm/page.h>
>  #include <asm/prom.h>
>  
>  #include <asm/mach-jz4740/base.h>
> @@ -103,3 +104,26 @@ void __init arch_init_irq(void)
>  {
>  	irqchip_init();
>  }
> +
> +/*
> + * We have seen MMC DMA transfers read corrupted data from SDRAM when a burst
> + * interval ends at physical address 0x10000000. To avoid this problem, we
> + * remove the final page of low memory from the memory map.
> + */
> +void __init jz4770_reserve_unsafe_for_dma(void)
> +{
> +	int i;
> +
> +	for (i = 0; i < boot_mem_map.nr_map; i++) {
> +		struct boot_mem_map_entry *entry = boot_mem_map.map + i;
> +
> +		if (entry->type != BOOT_MEM_RAM)
> +			continue;
> +
> +		if (entry->addr + entry->size != 0x10000000)
> +			continue;
> +
> +		entry->size -= PAGE_SIZE;
> +		break;
> +	}
> +}
> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
> index 85bc601e9a0d..5a2c20145aee 100644
> --- a/arch/mips/kernel/setup.c
> +++ b/arch/mips/kernel/setup.c
> @@ -879,6 +879,14 @@ static void __init arch_mem_init(char **cmdline_p)
>  
>  	parse_early_param();
>  
> +#ifdef CONFIG_MACH_JZ4770
> +	if (current_cpu_type() == CPU_JZRISC &&
> +				mips_machtype == MACH_INGENIC_JZ4770) {
> +		extern void __init jz4770_reserve_unsafe_for_dma(void);
> +		jz4770_reserve_unsafe_for_dma();
> +	}
> +#endif

Hmm, a little bit ugly. I'm guessing the plat_mem_setup() callback is
too early since mem= parameters won't have been taken into account yet
from parse_early_param().

Is /memreserve/ in FDT of any value here or is it all too late due to
old DTs?

Cheers
James

> +
>  	if (usermem) {
>  		pr_info("User-defined physical RAM map:\n");
>  		print_memory_map();
> -- 
> 2.11.0
> 
> 

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  reply	other threads:[~2018-01-10 23:21 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-02 15:08 [PATCH v5 01/15] clk: ingenic: Use const pointer to clk_ops in struct Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 02/15] clk: ingenic: Fix recalc_rate for clocks with fixed divider Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 03/15] clk: ingenic: support PLLs with no bypass bit Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 04/15] clk: ingenic: Add code to enable/disable PLLs Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 05/15] dt-bindings: clock: Add jz4770-cgu.h header Paul Cercueil
2018-01-05 16:34   ` Rob Herring
2018-01-02 15:08 ` [PATCH v5 06/15] clk: Add Ingenic jz4770 CGU driver Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 07/15] MIPS: Setup boot_command_line before plat_mem_setup Paul Cercueil
2018-01-02 17:05   ` Mathieu Malaterre
2018-01-02 15:08 ` [PATCH v5 08/15] MIPS: ingenic: Use common cmdline handling code Paul Cercueil
2018-01-02 15:58   ` PrasannaKumar Muralidharan
2018-01-02 15:08 ` [PATCH v5 09/15] MIPS: platform: add machtype IDs for more Ingenic SoCs Paul Cercueil
2018-01-02 15:59   ` PrasannaKumar Muralidharan
2018-01-02 15:08 ` [PATCH v5 10/15] MIPS: ingenic: Add machine info for supported boards Paul Cercueil
2018-01-02 16:02   ` PrasannaKumar Muralidharan
2018-01-02 16:32     ` Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 11/15] MIPS: ingenic: Initial JZ4770 support Paul Cercueil
2018-01-02 16:09   ` PrasannaKumar Muralidharan
2018-01-02 15:08 ` [PATCH v5 12/15] MIPS: JZ4770: Work around config2 misreporting associativity Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers Paul Cercueil
2018-01-02 16:45   ` PrasannaKumar Muralidharan
2018-01-05 18:03     ` Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 14/15] devicetree/bindings: Add GCW vendor prefix Paul Cercueil
2018-01-02 15:08 ` [PATCH v5 15/15] MIPS: ingenic: Initial GCW Zero support Paul Cercueil
2018-01-02 17:04   ` Mathieu Malaterre
2018-01-05 18:24 ` [PATCH v6 00/15] JZ4770 SoC support Paul Cercueil
2018-01-05 18:24   ` [PATCH v6 01/15] clk: ingenic: Use const pointer to clk_ops in struct Paul Cercueil
2018-01-16 15:47     ` [PATCH v7 00/14] JZ4770 and GCW0 patchset Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 01/14] clk: ingenic: Use const pointer to clk_ops in struct Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 02/14] clk: ingenic: Fix recalc_rate for clocks with fixed divider Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 03/14] clk: ingenic: support PLLs with no bypass bit Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 04/14] clk: ingenic: Add code to enable/disable PLLs Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 05/14] dt-bindings: clock: Add jz4770-cgu.h header Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 06/14] clk: Add Ingenic jz4770 CGU driver Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 07/14] MIPS: Setup boot_command_line before plat_mem_setup Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 08/14] MIPS: ingenic: Use common cmdline handling code Paul Cercueil
2018-01-16 15:47       ` [PATCH v7 09/14] MIPS: platform: add machtype IDs for more Ingenic SoCs Paul Cercueil
2018-01-16 15:48       ` [PATCH v7 10/14] MIPS: ingenic: Detect machtype from SoC compatible string Paul Cercueil
2018-01-16 22:06         ` James Hogan
2018-01-16 15:48       ` [PATCH v7 11/14] MIPS: ingenic: Initial JZ4770 support Paul Cercueil
2018-01-17 21:28         ` James Hogan
2018-01-17 21:28           ` James Hogan
2018-01-18 17:14           ` Paul Cercueil
2018-01-18 20:30             ` James Hogan
2018-01-18 20:30               ` James Hogan
2018-01-16 15:48       ` [PATCH v7 12/14] MIPS: JZ4770: Work around config2 misreporting associativity Paul Cercueil
2018-01-16 15:48       ` [PATCH v7 13/14] devicetree/bindings: Add GCW vendor prefix Paul Cercueil
2018-01-16 15:48       ` [PATCH v7 14/14] MIPS: ingenic: Initial GCW Zero support Paul Cercueil
2018-02-01 15:31       ` [PATCH v7 00/14] JZ4770 and GCW0 patchset James Hogan
2018-01-05 18:25   ` [PATCH v6 02/15] clk: ingenic: Fix recalc_rate for clocks with fixed divider Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 03/15] clk: ingenic: support PLLs with no bypass bit Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 04/15] clk: ingenic: Add code to enable/disable PLLs Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 05/15] dt-bindings: clock: Add jz4770-cgu.h header Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 06/15] clk: Add Ingenic jz4770 CGU driver Paul Cercueil
2018-01-10 21:37     ` James Hogan
2018-01-10 21:37       ` James Hogan
2018-01-05 18:25   ` [PATCH v6 07/15] MIPS: Setup boot_command_line before plat_mem_setup Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 08/15] MIPS: ingenic: Use common cmdline handling code Paul Cercueil
2018-01-10 22:16     ` James Hogan
2018-01-10 22:16       ` James Hogan
2018-01-05 18:25   ` [PATCH v6 09/15] MIPS: platform: add machtype IDs for more Ingenic SoCs Paul Cercueil
2018-01-10 22:19     ` James Hogan
2018-01-10 22:19       ` James Hogan
2018-01-05 18:25   ` [PATCH v6 10/15] MIPS: ingenic: Detect machtype from SoC compatible string Paul Cercueil
2018-01-10 22:27     ` James Hogan
2018-01-10 22:27       ` James Hogan
2018-01-16 14:06       ` Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 11/15] MIPS: ingenic: Initial JZ4770 support Paul Cercueil
2018-01-10 22:42     ` James Hogan
2018-01-10 22:42       ` James Hogan
2018-01-05 18:25   ` [PATCH v6 12/15] MIPS: JZ4770: Work around config2 misreporting associativity Paul Cercueil
2018-01-10 22:52     ` James Hogan
2018-01-10 22:52       ` James Hogan
2018-01-05 18:25   ` [PATCH v6 13/15] MIPS: JZ4770: Workaround for corrupted DMA transfers Paul Cercueil
2018-01-10 23:20     ` James Hogan [this message]
2018-01-10 23:20       ` James Hogan
2018-01-16 14:10       ` Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 14/15] devicetree/bindings: Add GCW vendor prefix Paul Cercueil
2018-01-05 18:25   ` [PATCH v6 15/15] MIPS: ingenic: Initial GCW Zero support Paul Cercueil
2018-01-07 16:18     ` Philippe Ombredanne
2018-01-10 22:59       ` Paul Cercueil
2018-01-23 10:31         ` Philippe Ombredanne

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