From: Serge Semin <fancer.lancer@gmail.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>,
Paul Cercueil <paul@crapouillou.net>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
linux-kernel@vger.kernel.org,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: Re: [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150
Date: Tue, 30 May 2023 15:51:00 +0300 [thread overview]
Message-ID: <20230530125100.bd626syvkbfv7zhv@mobilestation> (raw)
In-Reply-To: <20230530124127.z5rr5vauw43rafrt@mobilestation>
On Tue, May 30, 2023 at 03:41:30PM +0300, Serge Semin wrote:
> On Tue, May 30, 2023 at 01:16:32PM +0100, Maciej W. Rozycki wrote:
> > On Tue, 30 May 2023, Jiaxun Yang wrote:
> >
> > > > Sure, but this change is not needed for it. You just need to declare
> > > > which ISA revisions your platform supports and leave `__get_cpu_type'
> > > > alone. It has worked like that for a decade now.
> > >
> > > I’m afraid it won’t work as you expected.
> > >
> > > Actually I ran into a problem that `case CPU_P5600` in c-r4k.c is optimised out
> > > by compiler, because the codepath is marked as unreachable.
> >
> > Maybe there's a bug elsewhere then. Send me your .config and I'll try to
> > reproduce it.
>
> I may have misunderstood something, but it seems like there is no such
> problem on my P5600 system:
>
> [fancer@mobilestation] kernel $ grep -r P5600 -B2 -A2 arch/mips/mm/c-r4k.c
> case CPU_1004K:
> case CPU_INTERAPTIV:
> case CPU_P5600:
> case CPU_PROAPTIV:
> case CPU_M5150:
> --
> case CPU_P6600:
> case CPU_M6250:
> pr_info("MIPS P5600 is here\n");
> if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
> (c->icache.waysize > PAGE_SIZE))
>
> Log:
> [ 0.000000] Linux version 6.4.0-rc1-bt1-00235-gf9efd6b74b12-dirty (fancer@mobilestation) (mipsel-baikal-linux-gcc (GCC) 7.3.0, GNU ld (GNU Binutils) 2.30.0.20180208) #1
> 275 SMP PREEMPT Tue May 30 15:30:48 MSK 2023
> [ 0.000000] CPU0 revision is: 0001a830 (MIPS P5600)
> [ 0.000000] FPU revision is: 30f30320
> [ 0.000000] MSA revision is: 00000320
> ...
> [ 0.000000] VPE topology {1,1} total 2
> [ 0.000000] MIPS P5600 is here
> ...
Here is the CPU-related kernel configs:
root@msbt2:~# cat /proc/config.gz | gunzip | grep CPU_MIPS
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS32_R5 is not set
# CONFIG_CPU_MIPS32_3_5_FEATURES is not set
CONFIG_CPU_MIPS32_R5_FEATURES=y
CONFIG_CPU_MIPS32_R5_XPA=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_CPU_MIPS32_R3_5=y
CONFIG_SYS_HAS_CPU_MIPS32_R5=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPSR5=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
-Serge(y)
>
> -Serge(y)
>
> >
> > Maciej
next prev parent reply other threads:[~2023-05-30 12:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-29 13:52 [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150 Jiaxun Yang
2023-05-29 13:52 ` [PATCH 2/2] MIPS: generic: Allow R5 CPUs to be selected Jiaxun Yang
2023-05-30 13:37 ` Serge Semin
2023-06-09 8:21 ` Thomas Bogendoerfer
2023-05-30 8:03 ` [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150 Maciej W. Rozycki
2023-05-30 8:18 ` Paul Cercueil
2023-05-30 9:13 ` Maciej W. Rozycki
2023-05-30 10:11 ` Jiaxun Yang
2023-05-30 11:07 ` Maciej W. Rozycki
2023-05-30 11:54 ` Jiaxun Yang
2023-05-30 12:16 ` Maciej W. Rozycki
2023-05-30 12:41 ` Serge Semin
2023-05-30 12:51 ` Serge Semin [this message]
2023-05-30 12:57 ` Jiaxun Yang
2023-05-30 13:10 ` Jiaxun Yang
2023-05-30 13:14 ` Maciej W. Rozycki
2023-05-30 13:33 ` Serge Semin
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