From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: Paul Cercueil <paul@crapouillou.net>,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
linux-kernel@vger.kernel.org,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: Re: [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150
Date: Tue, 30 May 2023 14:10:04 +0100 [thread overview]
Message-ID: <5CC33034-4AF3-4522-9942-8BCCEF1086AE@flygoat.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2305301315120.42601@angie.orcam.me.uk>
> 2023年5月30日 13:16,Maciej W. Rozycki <macro@orcam.me.uk> 写道:
>
> On Tue, 30 May 2023, Jiaxun Yang wrote:
>
>>> Sure, but this change is not needed for it. You just need to declare
>>> which ISA revisions your platform supports and leave `__get_cpu_type'
>>> alone. It has worked like that for a decade now.
>>
>> I’m afraid it won’t work as you expected.
>>
>> Actually I ran into a problem that `case CPU_P5600` in c-r4k.c is optimised out
>> by compiler, because the codepath is marked as unreachable.
>
> Maybe there's a bug elsewhere then. Send me your .config and I'll try to
> reproduce it.
Ok I see the problem, after applying patch 2 the issue is gone.
So actually only patch 2 is necessary.
The unreachable mark here leads gcc to generate some confusing code
and I misread it.
Sorry for the noise.
Thanks
- Jiaxun
>
> Maciej
next prev parent reply other threads:[~2023-05-30 13:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-29 13:52 [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150 Jiaxun Yang
2023-05-29 13:52 ` [PATCH 2/2] MIPS: generic: Allow R5 CPUs to be selected Jiaxun Yang
2023-05-30 13:37 ` Serge Semin
2023-06-09 8:21 ` Thomas Bogendoerfer
2023-05-30 8:03 ` [PATCH 1/2] MIPS: Allow MIPS32R2 kernel to run on P5600 and M5150 Maciej W. Rozycki
2023-05-30 8:18 ` Paul Cercueil
2023-05-30 9:13 ` Maciej W. Rozycki
2023-05-30 10:11 ` Jiaxun Yang
2023-05-30 11:07 ` Maciej W. Rozycki
2023-05-30 11:54 ` Jiaxun Yang
2023-05-30 12:16 ` Maciej W. Rozycki
2023-05-30 12:41 ` Serge Semin
2023-05-30 12:51 ` Serge Semin
2023-05-30 12:57 ` Jiaxun Yang
2023-05-30 13:10 ` Jiaxun Yang [this message]
2023-05-30 13:14 ` Maciej W. Rozycki
2023-05-30 13:33 ` Serge Semin
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