Linux MIPS Architecture development
 help / color / mirror / Atom feed
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Jiaxun Yang <jiaxun.yang@flygoat.com>,
	stable@vger.kernel.org
Subject: [PATCH fixes 0/4] MIPS: MT ASE fixes
Date: Sun, 16 Jun 2024 14:25:01 +0100	[thread overview]
Message-ID: <20240616-mips-mt-fixes-v1-0-83913e0e60fc@flygoat.com> (raw)

Hi all,

This series fixed multiple problems for MT ASE handling in current
kernel code.

PATCH 1 is critical, although it's not causing problems on MT kernel,
we are risking clobbering register here.

Rest are usual build fixes for adopting toolcahins.

Please apply it to fixes tree.

Thanks.
- Jiaxun

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
Jiaxun Yang (4):
      MIPS: mipsmtregs: Fix target register for MFTC0
      MIPS: asmmacro: Fix MT ASE macros
      MIPS: cps-vec: Replace MT instructions with macros
      MIPS: Use toolchain MT ASE support whenever possible

 arch/mips/Makefile                 |   2 +
 arch/mips/include/asm/asmmacro.h   | 241 +++++++++++++++++++++++++++++++++----
 arch/mips/include/asm/mipsmtregs.h |  42 ++++++-
 arch/mips/kernel/cps-vec.S         |  62 ++++------
 4 files changed, 287 insertions(+), 60 deletions(-)
---
base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0
change-id: 20240616-mips-mt-fixes-50eb56d2159c

Best regards,
-- 
Jiaxun Yang <jiaxun.yang@flygoat.com>


             reply	other threads:[~2024-06-16 13:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-16 13:25 Jiaxun Yang [this message]
2024-06-16 13:25 ` [PATCH fixes 1/4] MIPS: mipsmtregs: Fix target register for MFTC0 Jiaxun Yang
2024-06-19 11:32   ` Jiaxun Yang
2024-06-19 11:37     ` Jiaxun Yang
2024-06-20 14:43       ` Thomas Bogendoerfer
2024-06-21  8:25   ` Thomas Bogendoerfer
2024-06-16 13:25 ` [PATCH fixes 2/4] MIPS: asmmacro: Fix MT ASE macros Jiaxun Yang
2024-06-16 13:25 ` [PATCH fixes 3/4] MIPS: cps-vec: Replace MT instructions with macros Jiaxun Yang
2024-06-27  9:00   ` Thomas Bogendoerfer
2024-06-27 11:14     ` Jiaxun Yang
2024-06-27 19:51       ` Maciej W. Rozycki
2024-06-28  0:36         ` Jiaxun Yang
2024-06-16 13:25 ` [PATCH fixes 4/4] MIPS: Use toolchain MT ASE support whenever possible Jiaxun Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240616-mips-mt-fixes-v1-0-83913e0e60fc@flygoat.com \
    --to=jiaxun.yang@flygoat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=stable@vger.kernel.org \
    --cc=tsbogend@alpha.franken.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox