Re: [PATCH fixes 1/4] MIPS: mipsmtregs: Fix target register for MFTC0

["Jiaxun Yang" <jiaxun.yang@flygoat.com>]

在2024年6月16日六月 下午2:25，Jiaxun Yang写道：
> Target register of mftc0 should be __res instead of $1, this is
> a leftover from old .insn code.
>
> Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Hi Thomas,

I saw you sent mips-fixes_6.10_1 pull request but this series is
not included in that PR while one of my later patch is included.

If you think the whole series is not fit for fixes tree then please
at least let this series go through fixes tree. There are many MT
users for routers etc and I don't want to risk break things for them
in linus tree for too long.

The patch itself is obvious.

Thanks
- Jiaxun

> ---
>  arch/mips/include/asm/mipsmtregs.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/mipsmtregs.h 
> b/arch/mips/include/asm/mipsmtregs.h
> index 30e86861c206..b1ee3c48e84b 100644
> --- a/arch/mips/include/asm/mipsmtregs.h
> +++ b/arch/mips/include/asm/mipsmtregs.h
> @@ -322,7 +322,7 @@ static inline void ehb(void)
>  	"	.set	push				\n"	\
>  	"	.set	"MIPS_ISA_LEVEL"		\n"	\
>  	_ASM_SET_MFTC0							\
> -	"	mftc0	$1, " #rt ", " #sel "		\n"	\
> +	"	mftc0	%0, " #rt ", " #sel "		\n"	\
>  	_ASM_UNSET_MFTC0						\
>  	"	.set	pop				\n"	\
>  	: "=r" (__res));						\
>
> -- 
> 2.43.0

-- 
- Jiaxun