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From: Sander Vanheule <sander@svanheule.net>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Chris Packham <chris.packham@alliedtelesis.co.nz>,
	devicetree@vger.kernel.org, linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, Sander Vanheule <sander@svanheule.net>
Subject: [PATCH 4/9] mips: dts: realtek: Fold rtl83xx into rtl838x
Date: Sun, 19 Jan 2025 19:34:19 +0100	[thread overview]
Message-ID: <20250119183424.259353-5-sander@svanheule.net> (raw)
In-Reply-To: <20250119183424.259353-1-sander@svanheule.net>

rtl83xx.dtsi was once (presumably) created as a base for both RTL838x
and RTL839x SoCs. Both SoCs have a different CPU and the peripherals
require different compatibles. Fold rtl83xx.dtsi into rtl838x.dtsi,
currently only supporting RTL838x SoCs, and create the RTL839x base
include later when required.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
---
 arch/mips/boot/dts/realtek/cisco_sg220-26.dts |  1 -
 arch/mips/boot/dts/realtek/rtl838x.dtsi       | 56 ++++++++++++++++++
 arch/mips/boot/dts/realtek/rtl83xx.dtsi       | 59 -------------------
 3 files changed, 56 insertions(+), 60 deletions(-)
 delete mode 100644 arch/mips/boot/dts/realtek/rtl83xx.dtsi

diff --git a/arch/mips/boot/dts/realtek/cisco_sg220-26.dts b/arch/mips/boot/dts/realtek/cisco_sg220-26.dts
index 1cdbb09297ef..cb85d172a1d3 100644
--- a/arch/mips/boot/dts/realtek/cisco_sg220-26.dts
+++ b/arch/mips/boot/dts/realtek/cisco_sg220-26.dts
@@ -2,7 +2,6 @@
 
 /dts-v1/;
 
-#include "rtl83xx.dtsi"
 #include "rtl838x.dtsi"
 
 / {
diff --git a/arch/mips/boot/dts/realtek/rtl838x.dtsi b/arch/mips/boot/dts/realtek/rtl838x.dtsi
index d2c6baabb38c..907449094536 100644
--- a/arch/mips/boot/dts/realtek/rtl838x.dtsi
+++ b/arch/mips/boot/dts/realtek/rtl838x.dtsi
@@ -1,6 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
 
 / {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -18,4 +26,52 @@ baseclk: baseclk {
 		#clock-cells = <0>;
 		clock-frequency = <500000000>;
 	};
+
+	cpuintc: cpuintc {
+		compatible = "mti,cpu-interrupt-controller";
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+	};
+
+	soc@18000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x18000000 0x10000>;
+
+		uart0: serial@2000 {
+			compatible = "ns16550a";
+			reg = <0x2000 0x100>;
+
+			clock-frequency = <200000000>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <31>;
+
+			reg-io-width = <1>;
+			reg-shift = <2>;
+			fifo-size = <1>;
+			no-loopback-test;
+
+			status = "disabled";
+		};
+
+		uart1: serial@2100 {
+			compatible = "ns16550a";
+			reg = <0x2100 0x100>;
+
+			clock-frequency = <200000000>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <30>;
+
+			reg-io-width = <1>;
+			reg-shift = <2>;
+			fifo-size = <1>;
+			no-loopback-test;
+
+			status = "disabled";
+		};
+	};
 };
diff --git a/arch/mips/boot/dts/realtek/rtl83xx.dtsi b/arch/mips/boot/dts/realtek/rtl83xx.dtsi
deleted file mode 100644
index 1039cb50c7da..000000000000
--- a/arch/mips/boot/dts/realtek/rtl83xx.dtsi
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	aliases {
-		serial0 = &uart0;
-		serial1 = &uart1;
-	};
-
-	cpuintc: cpuintc {
-		compatible = "mti,cpu-interrupt-controller";
-		#address-cells = <0>;
-		#interrupt-cells = <1>;
-		interrupt-controller;
-	};
-
-	soc@18000000 {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0x0 0x18000000 0x10000>;
-
-		uart0: serial@2000 {
-			compatible = "ns16550a";
-			reg = <0x2000 0x100>;
-
-			clock-frequency = <200000000>;
-
-			interrupt-parent = <&cpuintc>;
-			interrupts = <31>;
-
-			reg-io-width = <1>;
-			reg-shift = <2>;
-			fifo-size = <1>;
-			no-loopback-test;
-
-			status = "disabled";
-		};
-
-		uart1: serial@2100 {
-			compatible = "ns16550a";
-			reg = <0x2100 0x100>;
-
-			clock-frequency = <200000000>;
-
-			interrupt-parent = <&cpuintc>;
-			interrupts = <30>;
-
-			reg-io-width = <1>;
-			reg-shift = <2>;
-			fifo-size = <1>;
-			no-loopback-test;
-
-			status = "disabled";
-		};
-	};
-};
-- 
2.48.1


  parent reply	other threads:[~2025-01-19 18:44 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-19 18:34 [PATCH 0/9] mips: dts: Split Realtek devicetrees Sander Vanheule
2025-01-19 18:34 ` [PATCH 1/9] mips: dts: realtek: Decouple RTL930x base DTSI Sander Vanheule
2025-01-20  1:20   ` Chris Packham
2025-01-19 18:34 ` [PATCH 2/9] mips: dts: realtek: Clean up CPU clocks Sander Vanheule
2025-01-20  1:21   ` Chris Packham
2025-01-19 18:34 ` [PATCH 3/9] mips: dts: realtek: Add address to SoC node name Sander Vanheule
2025-01-20  1:22   ` Chris Packham
2025-01-19 18:34 ` Sander Vanheule [this message]
2025-01-20  1:23   ` [PATCH 4/9] mips: dts: realtek: Fold rtl83xx into rtl838x Chris Packham
2025-01-19 18:34 ` [PATCH 5/9] mips: dts: realtek: Add SoC IRQ node for RTL838x Sander Vanheule
2025-01-19 18:34 ` [PATCH 6/9] mips: dts: realtek: Correct uart interrupt-parent Sander Vanheule
2025-01-19 18:34 ` [PATCH 7/9] mips: dts: realtek: Replace uart clock property Sander Vanheule
2025-01-19 18:34 ` [PATCH 8/9] mips: dts: realtek: Add RTL838x SoC peripherals Sander Vanheule
2025-01-19 18:34 ` [PATCH 9/9] mips: dts: realtek: Add restart to Cisco SG220-26P Sander Vanheule
2025-02-21 15:27 ` [PATCH 0/9] mips: dts: Split Realtek devicetrees Thomas Bogendoerfer
2025-02-22 10:57   ` Sander Vanheule

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