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From: Jun Sun <jsun@mvista.com>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: linux@cthulhu.engr.sgi.com, linux-mips@fnet.fr, ralf@oss.sgi.com
Subject: Re: PROPOSAL : multi-way cache support in Linux/MIPS
Date: Wed, 02 Aug 2000 14:50:19 -0700	[thread overview]
Message-ID: <3988979B.D264F549@mvista.com> (raw)
In-Reply-To: 01ac01bffcad$a767c240$0deca8c0@Ulysses

"Kevin D. Kissell" wrote:
> It's possible to write code that is compatible with an R4000 but
> not MIPS32, and vice versa, but they are 99% identical.
> 

Kevin,

Is that possible you can list the 1% difference here?  

I have always been confused by MIPS32/MIPS64 vs R3000/R4000/etc.  (And
on top of it, there is also MIPS I, II, III, IV, etc...).  I am sure I
am not the only one.

If you can give an pointer that will clarify names, that would be good
too.


Jun

  parent reply	other threads:[~2000-08-02 21:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2000-08-02 18:15 PROPOSAL : multi-way cache support in Linux/MIPS Kevin D. Kissell
2000-08-02 18:15 ` Kevin D. Kissell
2000-08-02 21:50 ` Jun Sun [this message]
  -- strict thread matches above, loose matches on Subject: below --
2000-08-02 22:44 Kevin D. Kissell
2000-08-02 22:44 ` Kevin D. Kissell
2000-08-02 23:10 ` Jun Sun
2000-08-02 23:31   ` Ralf Baechle
2000-08-02 18:36 Kevin D. Kissell
2000-08-02 18:36 ` Kevin D. Kissell
2000-08-02  8:26 Kevin D. Kissell
2000-08-02  8:26 ` Kevin D. Kissell
2000-08-02 17:05 ` Jun Sun
2000-08-01 23:52 Jun Sun
2000-08-02 18:12 ` Dominic Sweetman
2000-08-02 21:38   ` Jun Sun

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