Re: [PATCH v6 1/1] MIPS: Fix idle VS timer enqueue

["Jiaxun Yang" <jiaxun.yang@flygoat.com>]

在2025年3月31日星期周一 下午9:09，Maciej W. Rozycki写道：
[...]
>
>  FAOD I have one MIPS32r2 system wired for testing, but that might not be 
> the most interesting configuration to verify as it'll now just use EI/EHB 
> to enable interrupts ahead of WAIT.  I could try an R1 kernel instead, but 
> I'm not sure if it can be made to work owing to the differences in the FPU 
> between R1 and R2 for the MIPS32 ISA.  I used to have a MIPS64 (R1) system 
> there, but the CPU daughtercard sadly stopped working 3 years ago and I 
> wasn't able to repair it, owing to the lack of available spare parts (it's 
> most likely a dead CPU).

I can test on legacy (R1 version) 4Kc RTL simulator if you wish. Is there any
thing specific you want to test? I think I can try interrupt flood and see if
there is any deadlock.

The simulation is painfully slow, so I'd wish to minimize test vector.

Thanks


-- 
- Jiaxun