Clock interrupt simulation on sde-gdb

Clock interrupt simulation on sde-gdb

[navin]

Hi,

I am new to MIPS. So please don't mind if this is a trivial question.

I am trying to run microC/OS-II over MIPS 4KE. At this point of time, 
as there is no hardware available. I am trying to test my code using
sde-gdb simulator.

For proper task scheduling, etc, microC/OS-II needs to get periodic
interrupt from MIPS. I understand the possible implementation of such
facility in MIPS (i.e. using Count and Compare registers of CP0).

On trying to test microC/OS-II, I find that HW5 interrupt is not getting
generated. I verified by dumping value of a global variable which would
get updated in the timer expiry function. As a result task scheduling is
not happening.

As such my bootup code seems to be configuring thigs (Count, Compare, and
Status registers) properly. Is it that such timer interrupt CAN'T BE 
SIMULATED on sde-gdb? I have tried trace32 simulator software 
(demo version) also.

Any help will be highly appreciated,

Regards,
Navin

Re: Clock interrupt simulation on sde-gdb

[Chris Dearman]

navin wrote:
> As such my bootup code seems to be configuring thigs (Count, Compare, and
> Status registers) properly. Is it that such timer interrupt CAN'T BE 
> SIMULATED on sde-gdb? I have tried trace32 simulator software 

   The simulator built into sde-gdb does not support exceptions. 
sde-gdb can connect to MIPSsim which is a full ISS. If you're interested 
in trying this, drop me a line and I will get someone to contact you.

	Regards
		Chris

-- 
Chris Dearman          The Fruit Farm, Ely Road    voice +44 1223 706206
MIPS Technologies (UK) Chittering, Cambs, CB5 9PH  fax   +44 1223 706250

Marvell MV64340 documentation.

[Pavel Kiryukhin]

Hi all,
is there any available documentation on Marvell MV64340 system controller?
Any links will be appreciated! 
===============
Regards,
Pavel Kiryukhin,
RTSoft

Re: Marvell MV64340 documentation.

[Ralf Baechle]

On Tue, Jan 27, 2004 at 05:45:32PM +0300, Pavel Kiryukhin wrote:
> Date: Tue, 27 Jan 2004 17:45:32 +0300

> Hi all,
> is there any available documentation on Marvell MV64340 system controller?
> Any links will be appreciated! 

Marvell wants a NDA for documentation.

  Ralf

Re: Marvell MV64340 documentation.

[Matthew Dharm]

On Tue, Jan 27, 2004 at 04:25:33PM +0100, Ralf Baechle wrote:
> On Tue, Jan 27, 2004 at 05:45:32PM +0300, Pavel Kiryukhin wrote:
> > Date: Tue, 27 Jan 2004 17:45:32 +0300
> 
> > Hi all,
> > is there any available documentation on Marvell MV64340 system controller?
> > Any links will be appreciated! 
> 
> Marvell wants a NDA for documentation.

We have a full set of documentation.  If your question is general we can
try to answer it for you.

Matt

-- 
Matthew Dharm                              Work: mdharm@momenco.com
Senior Software Designer, Momentum Computer

Marvell MV64340 documentation

[Sergey Podstavin]

Hello Matthew!

Could you write me what do bits mean in the interrupt cause registers
for MV64340 Ethernet? I need to handle them in the interrupt handler for
the Gigabit Ethernet in the driver.

Best wishes,
Sergey Podstavin,
software engineer.  

RE: Marvell MV64340 documentation

[Matthew Dharm]

I can't really answer something that specific without violating the NDA.
Sorry.

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com


> -----Original Message-----
> From: linux-mips-bounce@linux-mips.org 
> [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Sergey 
> Podstavin
> Sent: Tuesday, January 27, 2004 10:45 AM
> To: Matthew Dharm
> Cc: Pavel Kiryukhin; linux-mips@linux-mips.org
> Subject: Marvell MV64340 documentation
> 
> 
> Hello Matthew!
> 
> Could you write me what do bits mean in the interrupt cause 
> registers for MV64340 Ethernet? I need to handle them in the 
> interrupt handler for the Gigabit Ethernet in the driver.
> 
> Best wishes,
> Sergey Podstavin,
> software engineer.  
> 
> 

RE: Marvell MV64340 documentation

[Matthew Dharm]

I can't really answer something that specific without violating the NDA.
Sorry.

Matt

--
Matthew D. Dharm                            Senior Software Designer
Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
(760) 431-8663 X-115                        Carlsbad, CA 92008-7310
Momentum Works For You                      www.momenco.com


> -----Original Message-----
> From: linux-mips-bounce@linux-mips.org 
> [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Sergey 
> Podstavin
> Sent: Tuesday, January 27, 2004 10:45 AM
> To: Matthew Dharm
> Cc: Pavel Kiryukhin; linux-mips@linux-mips.org
> Subject: Marvell MV64340 documentation
> 
> 
> Hello Matthew!
> 
> Could you write me what do bits mean in the interrupt cause 
> registers for MV64340 Ethernet? I need to handle them in the 
> interrupt handler for the Gigabit Ethernet in the driver.
> 
> Best wishes,
> Sergey Podstavin,
> software engineer.  
> 
> 

RE: Marvell MV64340 documentation

[Sergey Podstavin]

It's OK, don't worry. 

Sergey.

On Tue, 2004-01-27 at 22:39, Matthew Dharm wrote:
> I can't really answer something that specific without violating the NDA.
> Sorry.
> 
> Matt
> 
> --
> Matthew D. Dharm                            Senior Software Designer
> Momentum Computer Inc.                      1815 Aston Ave.  Suite 107
> (760) 431-8663 X-115                        Carlsbad, CA 92008-7310
> Momentum Works For You                      www.momenco.com
> 
> 
> > -----Original Message-----
> > From: linux-mips-bounce@linux-mips.org 
> > [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Sergey 
> > Podstavin
> > Sent: Tuesday, January 27, 2004 10:45 AM
> > To: Matthew Dharm
> > Cc: Pavel Kiryukhin; linux-mips@linux-mips.org
> > Subject: Marvell MV64340 documentation
> > 
> > 
> > Hello Matthew!
> > 
> > Could you write me what do bits mean in the interrupt cause 
> > registers for MV64340 Ethernet? I need to handle them in the 
> > interrupt handler for the Gigabit Ethernet in the driver.
> > 
> > Best wishes,
> > Sergey Podstavin,
> > software engineer.  
> > 
> > 
> 
> 

Re: Marvell MV64340 documentation

[Ralf Baechle]

On Tue, Jan 27, 2004 at 11:39:34AM -0800, Matthew Dharm wrote:

> > Could you write me what do bits mean in the interrupt cause 
> > registers for MV64340 Ethernet? I need to handle them in the 
> > interrupt handler for the Gigabit Ethernet in the driver.

> I can't really answer something that specific without violating the NDA.

The quality of support in free software tends to be proportional to the
availability of documentation.  Their score definately isn't Marvellous
here ;-)

  Ralf