From: David Daney <ddaney@caviumnetworks.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
Matthew Fortune <Matthew.Fortune@imgtec.com>,
David Daney <david.s.daney@gmail.com>,
Rich Felker <dalias@libc.org>,
David Daney <ddaney.cavm@gmail.com>,
"libc-alpha@sourceware.org" <libc-alpha@sourceware.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
David Daney <david.daney@cavium.com>
Subject: Re: [PATCH resend] MIPS: Allow FPU emulator to use non-stack area.
Date: Tue, 7 Oct 2014 11:50:18 -0700 [thread overview]
Message-ID: <543435EA.7060406@caviumnetworks.com> (raw)
In-Reply-To: <CALCETrUQEbb=DotSzsneN7Hano_eC-EoTMko6uKcyZXvEcktkw@mail.gmail.com>
On 10/07/2014 11:44 AM, Andy Lutomirski wrote:
> On Tue, Oct 7, 2014 at 11:32 AM, Leonid Yegoshin
> <Leonid.Yegoshin@imgtec.com> wrote:
>> Well, I am not a subscriber to mail-list, so I read it the first time and
>> some notes:
>>
>
>>
>> 3) The signal happened during execution of emulated instruction - signals
>> are under control of kernel and we can easily delay a signal during
>> execution of emulated instruction until return from do_dsemulret. It is not
>> a big deal - nor code, nor performance. Thank you for good point.
>
> If you go down this particular rabbit hole, you will never come back out.
>
> What happens if one of those out-of-line instructions causes a
> synchronous trap? What if SIGSTOP arrives before ret? What if
> another thread removes the magic ret sequence?
>
>>
>> 4) The voice for doing any instruction emulation in kernel - it is not a
>> MIPS business model to force customer to put details of all Coprocessor 2
>> instructions public. We provide an interface and the rest is a customer
>> business. Besides that it is really painful to make a differentiation
>> between Cavium Octeon and some another CPU instructions with the same
>> opcode. On other side, leaving emulation of their instructions to them is
>> not a wise after having some good way doing that multiple years.
>
> IMO this is all backwards. If MIPS customers put proprietary
> instructions into their ISA, they leave out the FPU, and they put a
> proprietary insn in a branch delay slot, then I think that they
> deserve a fatal signal.
>
> There's a really easy solution for new systems: fix the toolchain.
> Teach the assembler to disallow any proprietary instructions in an FP
> branch delay slot.
>
Yes, gas for MIPS already has an instruction attribute for instructions
that cannot be placed in delay slots. It should be a fairly simple
matter to extend this to instructions that cannot be emulated.
Thanks,
David Daney
> --Andy
>
next prev parent reply other threads:[~2014-10-07 18:50 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-06 20:23 [PATCH resend] MIPS: Allow FPU emulator to use non-stack area David Daney
2014-10-06 20:54 ` Rich Felker
2014-10-06 21:18 ` David Daney
2014-10-06 21:18 ` David Daney
2014-10-06 21:31 ` Rich Felker
2014-10-06 21:45 ` David Daney
2014-10-06 21:45 ` David Daney
2014-10-06 21:58 ` Rich Felker
2014-10-06 22:17 ` David Daney
2014-10-06 22:17 ` David Daney
2014-10-06 23:08 ` Rich Felker
2014-10-06 23:38 ` Andy Lutomirski
2014-10-06 23:48 ` David Daney
2014-10-06 23:48 ` David Daney
2014-10-06 23:54 ` Andy Lutomirski
2014-10-07 0:05 ` Rich Felker
2014-10-07 0:11 ` Andrew Pinski
2014-10-07 0:21 ` Rich Felker
2014-10-07 0:28 ` Andrew Pinski
2014-10-07 0:29 ` Andy Lutomirski
2014-10-07 0:32 ` David Daney
2014-10-07 0:33 ` David Daney
2014-10-07 0:33 ` David Daney
2014-10-07 0:48 ` Andy Lutomirski
2014-10-07 0:49 ` Rich Felker
2014-10-07 4:50 ` David Daney
2014-10-07 9:13 ` Matthew Fortune
2014-10-07 9:13 ` Matthew Fortune
2014-10-07 10:52 ` James Hogan
2014-10-07 11:19 ` Rich Felker
2014-10-07 16:04 ` David Daney
2014-10-07 18:32 ` Leonid Yegoshin
2014-10-07 18:43 ` David Daney
2014-10-07 19:13 ` Leonid Yegoshin
2014-10-07 18:44 ` Andy Lutomirski
2014-10-07 18:50 ` David Daney [this message]
2014-10-07 19:09 ` Rich Felker
2014-10-07 19:16 ` Leonid Yegoshin
2014-10-07 19:21 ` Rich Felker
2014-10-07 19:27 ` Leonid Yegoshin
2014-10-07 19:28 ` Andy Lutomirski
2014-10-07 20:03 ` David Daney
2014-10-08 0:22 ` Andy Lutomirski
2014-10-07 19:40 ` Matthew Fortune
2014-10-07 11:11 ` Rich Felker
2014-10-07 16:08 ` David Daney
2014-10-07 16:08 ` David Daney
2014-10-07 18:16 ` Andy Lutomirski
2014-10-07 23:20 ` Ralf Baechle
2014-10-07 23:59 ` David Daney
2014-10-07 23:59 ` David Daney
2014-10-08 0:18 ` Chuck Ebbert
2014-10-08 0:18 ` Chuck Ebbert
2014-10-08 2:37 ` Rich Felker
2014-10-08 10:31 ` Paul Burton
2014-10-08 10:31 ` Paul Burton
2014-10-07 1:02 ` Kevin D. Kissell
2014-10-07 1:38 ` Rich Felker
2014-10-07 4:32 ` David Daney
2014-10-07 11:53 ` James Hogan
2014-10-07 11:53 ` James Hogan
2014-10-07 12:22 ` James Hogan
2014-10-07 12:22 ` James Hogan
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