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From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: <linux-mips@linux-mips.org>, <Zubair.Kakakhel@imgtec.com>,
	<geert+renesas@glider.be>, <david.daney@cavium.com>,
	<peterz@infradead.org>, <paul.gortmaker@windriver.com>,
	<davidlohr@hp.com>, <macro@linux-mips.org>, <chenhc@lemote.com>,
	<richard@nod.at>, <zajec5@gmail.com>, <keescook@chromium.org>,
	<alex@alex-smith.me.uk>, <tglx@linutronix.de>,
	<blogic@openwrt.org>, <jchandra@broadcom.com>,
	<paul.burton@imgtec.com>, <qais.yousef@imgtec.com>,
	<linux-kernel@vger.kernel.org>, <ralf@linux-mips.org>,
	<markos.chandras@imgtec.com>, <dengcheng.zhu@imgtec.com>,
	<manuel.lauss@gmail.com>, <akpm@linux-foundation.org>,
	<lars.persson@axis.com>
Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
Date: Thu, 9 Oct 2014 16:10:15 -0700	[thread overview]
Message-ID: <543715D7.1020505@imgtec.com> (raw)
In-Reply-To: <20141009224304.GA4818@jhogan-linux.le.imgtec.org>

>> Small stack of emulation blocks is supported because nested traps are possible
>> in MIPS32/64 R6 emulation mix with FPU emulation.
> Could you please clarify how this nesting of emulation blocks could
> happen now that signals are handled more cleanly.
>
> I.e. isn't the emuframe stuff only required for instructions in branch
> delay slots, and branches shouldn't be in branch delay slots anyway, so
> I don't get how they could nest.
>
It may be a case for mix of FPU and MIPS R6 emulations. I just keep both 
emulators separate as much as possible but I assume that without prove 
it may be stackable - some rollback is needed to join both and it may 
(probably) cause a double emulation setup - dsemul may be called twice 
for the same pair of instructions. I didn't see that yet, honestly and 
you may be right.

And as for signals - it is a different issue, some signal may happen 
before or after emulated instruction in emulation block and I see that. 
But I see it only before because of probability for it is a lot of 
higher. Unwinding is need because signal handler may not return but 
longjump to somewhere.

WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com,
	geert+renesas@glider.be, david.daney@cavium.com,
	peterz@infradead.org, paul.gortmaker@windriver.com,
	davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com,
	richard@nod.at, zajec5@gmail.com, keescook@chromium.org,
	alex@alex-smith.me.uk, tglx@linutronix.de, blogic@openwrt.org,
	jchandra@broadcom.com, paul.burton@imgtec.com,
	qais.yousef@imgtec.com, linux-kernel@vger.kernel.org,
	ralf@linux-mips.org, markos.chandras@imgtec.com,
	dengcheng.zhu@imgtec.com, manuel.lauss@gmail.com,
	akpm@linux-foundation.org, lars.persson@axis.com
Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
Date: Thu, 9 Oct 2014 16:10:15 -0700	[thread overview]
Message-ID: <543715D7.1020505@imgtec.com> (raw)
Message-ID: <20141009231015.fE5wh-WaODO04yl2HIxL_9bHC8bK92J9MsO35HgNPeI@z> (raw)
In-Reply-To: <20141009224304.GA4818@jhogan-linux.le.imgtec.org>

>> Small stack of emulation blocks is supported because nested traps are possible
>> in MIPS32/64 R6 emulation mix with FPU emulation.
> Could you please clarify how this nesting of emulation blocks could
> happen now that signals are handled more cleanly.
>
> I.e. isn't the emuframe stuff only required for instructions in branch
> delay slots, and branches shouldn't be in branch delay slots anyway, so
> I don't get how they could nest.
>
It may be a case for mix of FPU and MIPS R6 emulations. I just keep both 
emulators separate as much as possible but I assume that without prove 
it may be stackable - some rollback is needed to join both and it may 
(probably) cause a double emulation setup - dsemul may be called twice 
for the same pair of instructions. I didn't see that yet, honestly and 
you may be right.

And as for signals - it is a different issue, some signal may happen 
before or after emulated instruction in emulation block and I see that. 
But I see it only before because of probability for it is a lot of 
higher. Unwinding is need because signal handler may not return but 
longjump to somewhere.

  parent reply	other threads:[~2014-10-09 23:10 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-09 20:00 [PATCH v2 0/3] MIPS executable stack protection Leonid Yegoshin
2014-10-09 20:00 ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 1/3] MIPS: mips_flush_cache_range is added Leonid Yegoshin
2014-10-09 20:00   ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Leonid Yegoshin
2014-10-09 20:00   ` Leonid Yegoshin
2014-10-09 22:43   ` James Hogan
2014-10-09 22:43     ` James Hogan
2014-10-09 23:10     ` Leonid Yegoshin [this message]
2014-10-09 23:10       ` Leonid Yegoshin
2014-10-09 23:40       ` James Hogan
2014-10-09 23:40         ` James Hogan
2014-10-10  0:07         ` Leonid Yegoshin
2014-10-10  0:07           ` Leonid Yegoshin
2014-10-10 10:03           ` James Hogan
2014-10-10 10:03             ` James Hogan
2014-10-10 10:24             ` Peter Zijlstra
2014-10-10 22:47             ` Leonid Yegoshin
2014-10-10 22:47               ` Leonid Yegoshin
2014-10-10 22:56               ` David Daney
2014-10-10 23:40                 ` Leonid Yegoshin
2014-10-10 23:40                   ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 3/3] MIPS: set stack/data protection as non-executable Leonid Yegoshin
2014-10-09 20:00   ` Leonid Yegoshin
2014-10-09 21:42 ` [PATCH v2 0/3] MIPS executable stack protection David Daney
2014-10-09 22:18   ` Leonid Yegoshin
2014-10-09 22:18     ` Leonid Yegoshin
2014-10-09 22:28     ` Paul Burton
2014-10-09 22:28       ` Paul Burton
2014-10-09 22:59     ` David Daney
2014-10-09 22:59       ` David Daney
2014-10-09 23:48       ` Leonid Yegoshin
2014-10-09 23:48         ` Leonid Yegoshin

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