From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: <linux-mips@linux-mips.org>, <Zubair.Kakakhel@imgtec.com>,
<geert+renesas@glider.be>, <david.daney@cavium.com>,
<peterz@infradead.org>, <paul.gortmaker@windriver.com>,
<davidlohr@hp.com>, <macro@linux-mips.org>, <chenhc@lemote.com>,
<richard@nod.at>, <zajec5@gmail.com>, <keescook@chromium.org>,
<alex@alex-smith.me.uk>, <tglx@linutronix.de>,
<blogic@openwrt.org>, <jchandra@broadcom.com>,
<paul.burton@imgtec.com>, <qais.yousef@imgtec.com>,
<linux-kernel@vger.kernel.org>, <ralf@linux-mips.org>,
<markos.chandras@imgtec.com>, <dengcheng.zhu@imgtec.com>,
<manuel.lauss@gmail.com>, <akpm@linux-foundation.org>,
<lars.persson@axis.com>
Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
Date: Fri, 10 Oct 2014 15:47:56 -0700 [thread overview]
Message-ID: <5438621C.8020708@imgtec.com> (raw)
In-Reply-To: <20141010100334.GD4818@jhogan-linux.le.imgtec.org>
On 10/10/2014 03:03 AM, James Hogan wrote:
> I just mean an (illegal/undefined) sequence of FPU branch instructions
> in one anothers delay slots shouldn't be able to crash the kernel.
> Actually 2 of them would be enough to verify the kernel didn't get too
> confused. Maybe the second will be detected & ignored, or maybe it
> doesn't matter if the first emuframe gets overwritten by the second
> one from the kernels point of view.
Yes, I am looking into that sequences. I try to keep both emulators
isolated from the rest of kernel and from each other as much as possible
but intercalls via illegal combinations are still possible.
> From Peter Zijlstra:
> Right, look at uprobes, it does exactly all this with a single page.
> Slot allocation will block waiting for a free slot when all are in use.
I don't see a reason to change my 300 lines design into much more
lengthy code. That code has more links to the rest of kernel and high
possibility to execute atomic operation/locks/mutex/etc - I can't do it
for emulation of MIPS locking instructions.
- Leonid.
WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com,
geert+renesas@glider.be, david.daney@cavium.com,
peterz@infradead.org, paul.gortmaker@windriver.com,
davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com,
richard@nod.at, zajec5@gmail.com, keescook@chromium.org,
alex@alex-smith.me.uk, tglx@linutronix.de, blogic@openwrt.org,
jchandra@broadcom.com, paul.burton@imgtec.com,
qais.yousef@imgtec.com, linux-kernel@vger.kernel.org,
ralf@linux-mips.org, markos.chandras@imgtec.com,
dengcheng.zhu@imgtec.com, manuel.lauss@gmail.com,
akpm@linux-foundation.org, lars.persson@axis.com
Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
Date: Fri, 10 Oct 2014 15:47:56 -0700 [thread overview]
Message-ID: <5438621C.8020708@imgtec.com> (raw)
Message-ID: <20141010224756.EiEp98vxEFpGjJIl9GaVRQsPhlepQhEr7u1BHxed4_c@z> (raw)
In-Reply-To: <20141010100334.GD4818@jhogan-linux.le.imgtec.org>
On 10/10/2014 03:03 AM, James Hogan wrote:
> I just mean an (illegal/undefined) sequence of FPU branch instructions
> in one anothers delay slots shouldn't be able to crash the kernel.
> Actually 2 of them would be enough to verify the kernel didn't get too
> confused. Maybe the second will be detected & ignored, or maybe it
> doesn't matter if the first emuframe gets overwritten by the second
> one from the kernels point of view.
Yes, I am looking into that sequences. I try to keep both emulators
isolated from the rest of kernel and from each other as much as possible
but intercalls via illegal combinations are still possible.
> From Peter Zijlstra:
> Right, look at uprobes, it does exactly all this with a single page.
> Slot allocation will block waiting for a free slot when all are in use.
I don't see a reason to change my 300 lines design into much more
lengthy code. That code has more links to the rest of kernel and high
possibility to execute atomic operation/locks/mutex/etc - I can't do it
for emulation of MIPS locking instructions.
- Leonid.
next prev parent reply other threads:[~2014-10-10 22:48 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-09 20:00 [PATCH v2 0/3] MIPS executable stack protection Leonid Yegoshin
2014-10-09 20:00 ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 1/3] MIPS: mips_flush_cache_range is added Leonid Yegoshin
2014-10-09 20:00 ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Leonid Yegoshin
2014-10-09 20:00 ` Leonid Yegoshin
2014-10-09 22:43 ` James Hogan
2014-10-09 22:43 ` James Hogan
2014-10-09 23:10 ` Leonid Yegoshin
2014-10-09 23:10 ` Leonid Yegoshin
2014-10-09 23:40 ` James Hogan
2014-10-09 23:40 ` James Hogan
2014-10-10 0:07 ` Leonid Yegoshin
2014-10-10 0:07 ` Leonid Yegoshin
2014-10-10 10:03 ` James Hogan
2014-10-10 10:03 ` James Hogan
2014-10-10 10:24 ` Peter Zijlstra
2014-10-10 22:47 ` Leonid Yegoshin [this message]
2014-10-10 22:47 ` Leonid Yegoshin
2014-10-10 22:56 ` David Daney
2014-10-10 23:40 ` Leonid Yegoshin
2014-10-10 23:40 ` Leonid Yegoshin
2014-10-09 20:00 ` [PATCH v2 3/3] MIPS: set stack/data protection as non-executable Leonid Yegoshin
2014-10-09 20:00 ` Leonid Yegoshin
2014-10-09 21:42 ` [PATCH v2 0/3] MIPS executable stack protection David Daney
2014-10-09 22:18 ` Leonid Yegoshin
2014-10-09 22:18 ` Leonid Yegoshin
2014-10-09 22:28 ` Paul Burton
2014-10-09 22:28 ` Paul Burton
2014-10-09 22:59 ` David Daney
2014-10-09 22:59 ` David Daney
2014-10-09 23:48 ` Leonid Yegoshin
2014-10-09 23:48 ` Leonid Yegoshin
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