From: David Daney <ddaney@caviumnetworks.com>
To: Abhishek Paliwal <abhishek.paliwal@aricent.com>
Cc: <kexin.hao@windriver.com>, <bo.liu@windriver.com>,
<Chandrakala.Chavva@caviumnetworks.com>,
<rakesh.garg@aricent.com>, David Daney <david.daney@cavium.com>,
Andreas Herrmann <andreas.herrmann@caviumnetworks.com>,
<linux-mips@linux-mips.org>, James Hogan <james.hogan@imgtec.com>,
<kvm@vger.kernel.org>, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 2/9] MIPS OCTEON Enable use of FPU
Date: Mon, 12 Jan 2015 09:30:41 -0800 [thread overview]
Message-ID: <54B404C1.7020409@caviumnetworks.com> (raw)
In-Reply-To: <1421046385-2535-3-git-send-email-abhishek.paliwal@aricent.com>
On 01/11/2015 11:06 PM, Abhishek Paliwal wrote:
> commit a36d8225bceba4b7be47ade34d175945f85cffbc upstream
Why are you spamming us with this? We don't need to know what you are
cherry-picking.
>
> Some versions of the assembler will not assemble CFC1 for OCTEON, so override the ISA for these.
>
> Add r4k_fpu.o to handle low level FPU initialization.
>
> Modify octeon_switch.S to save the FPU registers. And include r4k_switch.S to pick up more FPU support.
>
> Get rid of "#define cpu_has_fpu 0"
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> Cc: linux-mips@linux-mips.org
> Cc: James Hogan <james.hogan@imgtec.com>
> Cc: kvm@vger.kernel.org
> Patchwork: https://patchwork.linux-mips.org/patch/7006/
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
> Signed-off-by: Abhishek Paliwal <abhishek.paliwal@aricent.com>
> ---
> .../asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 -
> arch/mips/kernel/Makefile | 2 +-
> arch/mips/kernel/branch.c | 6 +-
> arch/mips/kernel/octeon_switch.S | 85 ++++++++++++++++------
> arch/mips/kernel/r4k_switch.S | 3 +
> arch/mips/math-emu/cp1emu.c | 12 ++-
> 6 files changed, 80 insertions(+), 29 deletions(-)
>
[...]
>
> "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."
I wrote the patch, what gives you the right to say that it is "...
proprietary to Aricent ..."? Nothing. We really must insist that you
quit making this type of misrepresentation.
David Daney
>
WARNING: multiple messages have this Message-ID (diff)
From: David Daney <ddaney@caviumnetworks.com>
To: Abhishek Paliwal <abhishek.paliwal@aricent.com>
Cc: kexin.hao@windriver.com, bo.liu@windriver.com,
Chandrakala.Chavva@caviumnetworks.com, rakesh.garg@aricent.com,
David Daney <david.daney@cavium.com>,
Andreas Herrmann <andreas.herrmann@caviumnetworks.com>,
linux-mips@linux-mips.org, James Hogan <james.hogan@imgtec.com>,
kvm@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 2/9] MIPS OCTEON Enable use of FPU
Date: Mon, 12 Jan 2015 09:30:41 -0800 [thread overview]
Message-ID: <54B404C1.7020409@caviumnetworks.com> (raw)
Message-ID: <20150112173041.-yFs203a2IdHH-LqRr5fkwVBNXdbp5QT4IHMX4e1pDY@z> (raw)
In-Reply-To: <1421046385-2535-3-git-send-email-abhishek.paliwal@aricent.com>
On 01/11/2015 11:06 PM, Abhishek Paliwal wrote:
> commit a36d8225bceba4b7be47ade34d175945f85cffbc upstream
Why are you spamming us with this? We don't need to know what you are
cherry-picking.
>
> Some versions of the assembler will not assemble CFC1 for OCTEON, so override the ISA for these.
>
> Add r4k_fpu.o to handle low level FPU initialization.
>
> Modify octeon_switch.S to save the FPU registers. And include r4k_switch.S to pick up more FPU support.
>
> Get rid of "#define cpu_has_fpu 0"
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
> Cc: linux-mips@linux-mips.org
> Cc: James Hogan <james.hogan@imgtec.com>
> Cc: kvm@vger.kernel.org
> Patchwork: https://patchwork.linux-mips.org/patch/7006/
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
> Signed-off-by: Abhishek Paliwal <abhishek.paliwal@aricent.com>
> ---
> .../asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 -
> arch/mips/kernel/Makefile | 2 +-
> arch/mips/kernel/branch.c | 6 +-
> arch/mips/kernel/octeon_switch.S | 85 ++++++++++++++++------
> arch/mips/kernel/r4k_switch.S | 3 +
> arch/mips/math-emu/cp1emu.c | 12 ++-
> 6 files changed, 80 insertions(+), 29 deletions(-)
>
[...]
>
> "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."
I wrote the patch, what gives you the right to say that it is "...
proprietary to Aricent ..."? Nothing. We really must insist that you
quit making this type of misrepresentation.
David Daney
>
next prev parent reply other threads:[~2015-01-12 17:30 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1421046385-2535-1-git-send-email-abhishek.paliwal@aricent.com>
2015-01-12 7:06 ` [PATCH 1/9] MIPS OCTEON Add OCTEON3 to get cpu type Abhishek Paliwal
2015-01-12 7:06 ` Abhishek Paliwal
2015-01-12 19:04 ` Aaro Koskinen
2015-01-12 7:06 ` [PATCH 2/9] MIPS OCTEON Enable use of FPU Abhishek Paliwal
2015-01-12 7:06 ` Abhishek Paliwal
2015-01-12 17:30 ` David Daney [this message]
2015-01-12 17:30 ` David Daney
2015-01-12 7:06 ` [PATCH 3/9] MIPS Add function get ebase cpunum Abhishek Paliwal
2015-01-12 7:06 ` Abhishek Paliwal
2015-01-12 7:06 ` [PATCH 4/9] MIPS Add minimal support for OCTEON3 to c-r4k.c Abhishek Paliwal
2015-01-12 7:06 ` Abhishek Paliwal
2015-01-12 7:06 ` [PATCH 5/9] MIPS donot build fast TLB refill handler with 32-bit kernels Abhishek Paliwal
2015-01-12 7:06 ` Abhishek Paliwal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54B404C1.7020409@caviumnetworks.com \
--to=ddaney@caviumnetworks.com \
--cc=Chandrakala.Chavva@caviumnetworks.com \
--cc=abhishek.paliwal@aricent.com \
--cc=andreas.herrmann@caviumnetworks.com \
--cc=bo.liu@windriver.com \
--cc=david.daney@cavium.com \
--cc=james.hogan@imgtec.com \
--cc=kexin.hao@windriver.com \
--cc=kvm@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=rakesh.garg@aricent.com \
--cc=ralf@linux-mips.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox