Re: [PATCH 1/6] MIPS: BMIPS: Disable pref 30 for buggy CPUs

[Florian Fainelli <f.fainelli@gmail.com>]

On 09/02/16 13:19, Maciej W. Rozycki wrote:
> On Tue, 9 Feb 2016, Florian Fainelli wrote:
> 
>> +static void bmips5000_pref30_quirk(void)
>> +{
>> +	__asm__ __volatile__(
>> +	"	.word	0x4008b008\n"	/* mfc0 $8, $22, 8 */
>> +	"	lui	$9, 0x0100\n"
>> +	"	or	$8, $9\n"
>> +	/* disable "pref 30" on buggy CPUs */
>> +	"	lui	$9, 0x0800\n"
>> +	"	or	$8, $9\n"
>> +	"	.word	0x4088b008\n"	/* mtc0 $8, $22, 8 */
>> +	: : : "$8", "$9");
>> +}
> 
>  Ouch, why not using our standard accessors and avoid magic numbers, e.g.:

Are you positive the assembler will not barf on these custom cp0 reg 22
selectors?

> 
> #define read_c0_brcm_whateverthisiscalled() \
> 	__read_32bit_c0_register($22, 8)
> #define write_c0_brcm_whateverthisiscalled(val) \
> 	__write_32bit_c0_register($22, 8, val)
> 
> #define BMIPS5000_WHATEVERTHISISCALLED_BIT_X 0x0100
> #define BMIPS5000_WHATEVERTHISISCALLED_BIT_Y 0x0800
> 
> static void bmips5000_pref30_quirk(void)
> {
> 	unsigned int whateverthisiscalled;
> 
> 	whateverthisiscalled = read_c0_brcm_whateverthisiscalled();
> 	whateverthisiscalled |= BMIPS_WHATEVERTHISISCALLED_BIT_X;
> 	/* disable "pref 30" on buggy CPUs */
> 	whateverthisiscalled |= BMIPS_WHATEVERTHISISCALLED_BIT_Y;
> 	write_c0_brcm_whateverthisiscalled(whateverthisiscalled);
> }
> 
> ?  I'm leaving it up to you to select the right names here -- just about 
> anything will be better than the halfway-binary piece you have proposed.

These are not standardized registers in any form, which is why these are
in a halfway-binary form, they are not meant to be re-used outside of
two known places: disabling pref30 and enabling "rotr".

> 
>  FYI, we already have BMIPS5000 accessors defined up to ($22, 7) in 
> <asm/mipsregs.h> so it will be the right place for the new ones as well.
> 
>   Maciej
> 


-- 
Florian