From: Florian Fainelli <f.fainelli@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org, blogic@openwrt.org,
cernekee@gmail.com, jon.fraser@broadcom.com, pgynther@google.com,
paul.burton@imgtec.com, ddaney.cavm@gmail.com
Subject: Re: [PATCH 6/6] MIPS: Expose current_cpu_data.options through debugfs
Date: Wed, 10 Feb 2016 17:58:23 -0800 [thread overview]
Message-ID: <56BBEABF.8030804@gmail.com> (raw)
In-Reply-To: <20160210104629.GA11091@linux-mips.org>
On 10/02/16 02:46, Ralf Baechle wrote:
> On Tue, Feb 09, 2016 at 12:55:54PM -0800, Florian Fainelli wrote:
>
>> Debugging a missing features in cpu-features-override.h, or a runtime feature
>> set/clear in the vendor specific cpu_probe() function can be a little tedious,
>> ease that by providing a debugfs entry representing the
>> current_cpu_data.options bitmask.
>
> Hm.. Bits in the options bitmaps are not an ABI, they come and sometimes
> they go as well and manual decoding can be tedious to humans. so I'm
> wondering if something in /sys/devices/system/cpu would be more suitable.
Not sure, you need this while bringing up systems and/or debugging why a
kernel does not have this or that enabled as you think it should,
outside of that, not so much probably?. More standard interfaces like
/proc/cpuinfo should be used, but that does not give you the full picture.
> It'd depend on just sysfs, not debugfs which is disabled in production
> kernels.
>
> Thoughts?
I suppose this is fine, in that case, we would probably want to go with
a text-based approach to make the interface more stable.
NB: I also have a patch that adds cache info reporting to MIPS, since it
seems useful for people dealing with user-space cache flushes (graphics,
JIT, etc.), Russell King rejected adding that for ARM, but ARM64 and x86
have it (arch/arm64/kernel/cacheinfo.c) would you oppose to having that
for MIPS?
--
Florian
next prev parent reply other threads:[~2016-02-11 1:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-09 20:55 [PATCH 0/6] MIPS: BMIPS: RIXI and workarounds support Florian Fainelli
2016-02-09 20:55 ` [PATCH 1/6] MIPS: BMIPS: Disable pref 30 for buggy CPUs Florian Fainelli
2016-02-09 21:01 ` Florian Fainelli
2016-02-09 23:42 ` Petri Gynther
2016-02-09 23:45 ` Florian Fainelli
2016-02-09 21:19 ` Maciej W. Rozycki
2016-02-09 21:19 ` Maciej W. Rozycki
2016-02-09 22:40 ` Florian Fainelli
2016-02-09 23:52 ` Maciej W. Rozycki
2016-02-09 23:52 ` Maciej W. Rozycki
2016-02-10 0:04 ` Florian Fainelli
2016-02-10 0:54 ` Maciej W. Rozycki
2016-02-10 0:54 ` Maciej W. Rozycki
2016-02-10 9:20 ` Ralf Baechle
2016-02-10 9:22 ` Ralf Baechle
2016-02-10 14:20 ` Maciej W. Rozycki
2016-02-10 14:20 ` Maciej W. Rozycki
2016-02-09 20:55 ` [PATCH 2/6] MIPS: BMIPS: Add early CPU initialization code Florian Fainelli
2016-02-09 20:55 ` [PATCH 3/6] MIPS: Allow RIXI to be used on non-R2 or R6 cores Florian Fainelli
2016-02-09 20:55 ` [PATCH 4/6] MIPS: Move RIXI exception enabling after vendor-specific cpu_probe Florian Fainelli
2016-02-09 20:55 ` [PATCH 5/6] MIPS: BMIPS: BMIPS4380 and BMIPS5000 support RIXI Florian Fainelli
2016-02-09 20:55 ` [PATCH 6/6] MIPS: Expose current_cpu_data.options through debugfs Florian Fainelli
2016-02-10 10:46 ` Ralf Baechle
2016-02-11 1:58 ` Florian Fainelli [this message]
2016-03-29 1:38 ` [PATCH 0/6] MIPS: BMIPS: RIXI and workarounds support Florian Fainelli
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