* Re: [PATCH] Fix SWARM build failure
From: Ralf Baechle @ 2007-10-31 16:31 UTC (permalink / raw)
To: Thiemo Seufer; +Cc: linux-mips
In-Reply-To: <20071031162656.GJ7712@networkno.de>
On Wed, Oct 31, 2007 at 04:26:56PM +0000, Thiemo Seufer wrote:
> This fixes a typo, the warning lets the build fail.
Well, there is difference between a pointer and it's address after all.
So it's good if gcc makes loud noise about it.
Ralf
^ permalink raw reply
* Re: WAIT vs. tickless kernel
From: Atsushi Nemoto @ 2007-10-31 16:31 UTC (permalink / raw)
To: ralf; +Cc: linux-mips
In-Reply-To: <20071031161333.GA22871@linux-mips.org>
On Wed, 31 Oct 2007 16:13:33 +0000, Ralf Baechle <ralf@linux-mips.org> wrote:
> This one is definately playing with the fire. Or alternatively requires
> detailed knowledge of the pipeline and pipelines tend to change. MIPS
> Technologies does regular maintenance releases of its cores which also
> add features and may change the pipelines in subtle way that may break
> something like this.
Yes, I never think this is robust or guaranteed...
> The only safe but ugly workaround is to change the return from exception
> code to detect if the EPC is in the range startin from the condition
> check in the idle loop to including the WAIT instruction and if so to
> patch the EPC to resume execution at the condition check or the
> instruction following the WAIT.
I'm also thinking of this approach. Still wondering if it is worth to
implement.
---
Atsushi Nemoto
^ permalink raw reply
* [PATCH] Fix SWARM build failure
From: Thiemo Seufer @ 2007-10-31 16:26 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
This fixes a typo, the warning lets the build fail.
Thiemo
Signed-off-by: Thiemo Seufer <ths@networkno.de>
---
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index e224fe7..f455ac1 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -155,7 +155,7 @@ void __cpuinit sb1250_clockevent_init(void)
action->flags = IRQF_DISABLED | IRQF_PERCPU;
action->name = name;
action->dev_id = cd;
- setup_irq(irq, &action);
+ setup_irq(irq, action);
}
/*
^ permalink raw reply related
* Re: WAIT vs. tickless kernel
From: Ralf Baechle @ 2007-10-31 16:13 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: linux-mips
In-Reply-To: <20071101.004906.106263529.anemo@mba.ocn.ne.jp>
On Thu, Nov 01, 2007 at 12:49:06AM +0900, Atsushi Nemoto wrote:
> On some CPUs, there is a small window in the idle task which might
> cause a large latency to wakeup a process.
>
> http://www.linux-mips.org/archives/linux-mips/2005-11/msg00114.html
>
> This can be avoided on some CPUs which can use xxx_wait_irqoff(), but
> still there are many CPUs out of luck.
>
> And now we have dyntick/tickless kernel. On tickless kernel the
> problem might become more serious. We cannot know the worst latency
> time. Theoretically a task can lose wakeup-event forever.
>
> Of course "nowait" kernel option will help, but are there any other
> good solutions?
>
> Just an idea: If we put an WAIT in hazard area of the MTC0 which
> enables interrupts, can we accomplish something like
> atomic-test-and-wait operation?
>
> void r4k_wait_bulletproof(void)
> {
> local_irq_disable();
> if (!need_resched())
> __asm__(
> " .set push \n"
> " .set mips3 \n"
> " .set noat \n"
> " .align 4 \n" /* avoid stall on wait */
> " mfc0 $1, $12 \n"
> " ori $1, 1 \n"
> " mtc0 $1, $12 \n"
> " wait \n"
> " xori $1, 1 \n"
> " mtc0 $1, $12 \n"
> " .set pop \n");
> local_irq_enable();
> }
>
> If this work as expected? Comments from pipeline gurus are welcome ;)
This one is definately playing with the fire. Or alternatively requires
detailed knowledge of the pipeline and pipelines tend to change. MIPS
Technologies does regular maintenance releases of its cores which also
add features and may change the pipelines in subtle way that may break
something like this.
The only safe but ugly workaround is to change the return from exception
code to detect if the EPC is in the range startin from the condition
check in the idle loop to including the WAIT instruction and if so to
patch the EPC to resume execution at the condition check or the
instruction following the WAIT.
Ralf
^ permalink raw reply
* WAIT vs. tickless kernel
From: Atsushi Nemoto @ 2007-10-31 15:49 UTC (permalink / raw)
To: linux-mips
On some CPUs, there is a small window in the idle task which might
cause a large latency to wakeup a process.
http://www.linux-mips.org/archives/linux-mips/2005-11/msg00114.html
This can be avoided on some CPUs which can use xxx_wait_irqoff(), but
still there are many CPUs out of luck.
And now we have dyntick/tickless kernel. On tickless kernel the
problem might become more serious. We cannot know the worst latency
time. Theoretically a task can lose wakeup-event forever.
Of course "nowait" kernel option will help, but are there any other
good solutions?
Just an idea: If we put an WAIT in hazard area of the MTC0 which
enables interrupts, can we accomplish something like
atomic-test-and-wait operation?
void r4k_wait_bulletproof(void)
{
local_irq_disable();
if (!need_resched())
__asm__(
" .set push \n"
" .set mips3 \n"
" .set noat \n"
" .align 4 \n" /* avoid stall on wait */
" mfc0 $1, $12 \n"
" ori $1, 1 \n"
" mtc0 $1, $12 \n"
" wait \n"
" xori $1, 1 \n"
" mtc0 $1, $12 \n"
" .set pop \n");
local_irq_enable();
}
If this work as expected? Comments from pipeline gurus are welcome ;)
---
Atsushi Nemoto
^ permalink raw reply
* Re: Preliminary patch for ip32 ttyS* device
From: Giuseppe Sacco @ 2007-10-31 14:59 UTC (permalink / raw)
To: mips kernel list
In-Reply-To: <20071031130828.GE14187@linux-mips.org>
Il giorno mer, 31/10/2007 alle 13.08 +0000, Ralf Baechle ha scritto:
> On Tue, Oct 30, 2007 at 09:40:15PM +0100, Giuseppe Sacco wrote:
[...]
> > diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
> > index 3bb5d24..7caa877 100644
> > --- a/drivers/serial/serial_core.c
> > +++ b/drivers/serial/serial_core.c
> > @@ -2455,6 +2455,8 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
> > case UPIO_AU:
> > case UPIO_TSI:
> > case UPIO_DWAPB:
> > + if (port1->mapbase==0 && port2->mapbase==0)
> > + return (port1->membase == port2->membase);
>
> This hack is only needed because ->mapbase is not initialized.
Right, for a few days I tried to correctly initialise mapbase and
setting UPF_IOREMAP in order to let this code calculate membase:
up->port.membase = ioremap(up->port.mapbase, size);
(drivers/serial/8250.c, function serial8250_request_std_resource)
but maybe we can just leave mapbase == 0 and change uart_match_port() as
in my patch.
Any other option?
^ permalink raw reply
* Re: [PATCH] More time cleanup
From: Ralf Baechle @ 2007-10-31 13:37 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: linux-mips
In-Reply-To: <20071031.012103.128619208.anemo@mba.ocn.ne.jp>
On Wed, Oct 31, 2007 at 01:21:03AM +0900, Atsushi Nemoto wrote:
> * Do not include unnecessary headers.
> * Do not mention time.README.
> * Do not mention mips_timer_ack.
> * Make clocksource_mips static. It is now dedicated to c0_timer.
> * Initialize clocksource_mips.read statically.
> * Remove null_hpt_read.
> * Remove an argument of plat_timer_setup. It is just a placeholder.
Thanks, applied.
Ralf
^ permalink raw reply
* Re: Preliminary patch for ip32 ttyS* device
From: Ralf Baechle @ 2007-10-31 13:08 UTC (permalink / raw)
To: Giuseppe Sacco; +Cc: mips kernel list, Martin Michlmayr
In-Reply-To: <20071030214015.050b7950.giuseppe@eppesuigoccas.homedns.org>
On Tue, Oct 30, 2007 at 09:40:15PM +0100, Giuseppe Sacco wrote:
> this is a patch that make ttyS0 and ttyS1 work on my SGI O2. I don't know if it is enough good for a general use since I am also changing code drivers/serial/serial_core.c. Probably the best solution would be to use mapbase instead of membase in arch/mips/sgi-ip32/ip32-platform.c.
> diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
> index 7309e48..77febd6 100644
> --- a/arch/mips/sgi-ip32/ip32-platform.c
> +++ b/arch/mips/sgi-ip32/ip32-platform.c
> @@ -42,7 +42,7 @@ static struct platform_device uart8250_device = {
> static int __init uart8250_init(void)
> {
> uart8250_data[0].membase = (void __iomem *) &mace->isa.serial1;
> - uart8250_data[1].membase = (void __iomem *) &mace->isa.serial1;
> + uart8250_data[1].membase = (void __iomem *) &mace->isa.serial2;
The s/isa.serial1/isa.serial2/ part looks reasonable.
> diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
> index 3bb5d24..7caa877 100644
> --- a/drivers/serial/serial_core.c
> +++ b/drivers/serial/serial_core.c
> @@ -2455,6 +2455,8 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
> case UPIO_AU:
> case UPIO_TSI:
> case UPIO_DWAPB:
> + if (port1->mapbase==0 && port2->mapbase==0)
> + return (port1->membase == port2->membase);
This hack is only needed because ->mapbase is not initialized.
Ralf
^ permalink raw reply
* Re: porting KGDB onto MIPS24K processor running linux-2.6.18.8
From: Ralf Baechle @ 2007-10-31 13:06 UTC (permalink / raw)
To: veerasena reddy; +Cc: linux-mips, linux-kernel.org
In-Reply-To: <245251.43610.qm@web8413.mail.in.yahoo.com>
On Wed, Oct 31, 2007 at 03:32:58PM +0530, veerasena reddy wrote:
> I would like to port KGDB on MIPS24K target processor which is running linux-2.6.18.8 kernel.
> Could you please guide me, where can I get the appropriate KGDB patch for 2.6.18.8 kernel?
Generic MIPS KGDB support is in the kernel. You will need to add two
functions getDebugChar and putDebugChar to do the debug I/O plus whatever
initialization the KGDB serial interface needs and have your platform
set SYS_SUPPORTS_KGDB in Kconfig to indicate it actually supports KGDB.
Ralf
^ permalink raw reply
* Re: Unknown Synbol:__make_dp
From: Ralf Baechle @ 2007-10-31 13:02 UTC (permalink / raw)
To: kaka; +Cc: linux-mips, uclinux-dev, linux-fbdev-users
In-Reply-To: <eea8a9c90710310335mdee2749i2c1758eb6b8f1041@mail.gmail.com>
On Wed, Oct 31, 2007 at 04:05:18PM +0530, kaka wrote:
> While installing the linux framebuffer driver by insmod cmd. i am getting
> the above error,
> Unknown Synbol:__make_dp
>
> Can anybody throw some light on it , kow to remove it?
This is a fp function. We told you before you cannot use the FPU in the
kernel or all hell will break loose.
Ralf
^ permalink raw reply
* Unknown Synbol:__make_dp
From: kaka @ 2007-10-31 10:35 UTC (permalink / raw)
To: linux-mips, uclinux-dev, linux-fbdev-users
[-- Attachment #1: Type: text/plain, Size: 230 bytes --]
Hi All,
While installing the linux framebuffer driver by insmod cmd. i am getting
the above error,
Unknown Synbol:__make_dp
Can anybody throw some light on it , kow to remove it?
Thanks in advance.
--
Thanks & Regards,
kaka
[-- Attachment #2: Type: text/html, Size: 436 bytes --]
^ permalink raw reply
* Re: Unknown Synbol:__gp_disp
From: sathesh babu @ 2007-10-31 10:21 UTC (permalink / raw)
To: kaka, linux-mips, uclinux-dev, linux-fbdev-users
In-Reply-To: <eea8a9c90710300215l2fdd9bf6u2238f1f9d8f1d66e@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 810 bytes --]
Hi,
Please use "-mno-pic -mno-abicalls -G 0" cflags along with kernel cflags to build the your module.
Regards,
Sathesh
kaka <share.kt@gmail.com> wrote:
Hi All,
While installing the driver by insmod cmd. i am getting the above error, Unknown Synbol:__gp_disp,
I have added ``-fno-pic -mno-abicalls'' option in the make file as
$(BCM_OBJ_DIR)/%.o: %.c
@echo '$(CC) -c $(notdir $<)'
@$(CC) -fno-pic -mno-abicalls -MMD -c $(CFLAGS) $< -o $@
I tried by adding those symbols in the CFLAGS
CFLAGS += -fno-pic -mno-abicalls.
But it didn't help my cause.
Could anybody plz look in to the error and reply?
Thanks in advance
--
Thanks & Regards,
kaka
---------------------------------
Bring your gang together - do your thing. Start your group.
[-- Attachment #2: Type: text/html, Size: 1424 bytes --]
^ permalink raw reply
* porting KGDB onto MIPS24K processor running linux-2.6.18.8
From: veerasena reddy @ 2007-10-31 10:02 UTC (permalink / raw)
To: linux-mips, linux-kernel.org
Hi,
I would like to port KGDB on MIPS24K target processor which is running linux-2.6.18.8 kernel.
Could you please guide me, where can I get the appropriate KGDB patch for 2.6.18.8 kernel?
Thanks in advance.
Regards,
Veerasena.
5, 50, 500, 5000 - Store N number of mails in your inbox. Go to http://help.yahoo.com/l/in/yahoo/mail/yahoomail/tools/tools-08.html
^ permalink raw reply
* Preliminary patch for ip32 ttyS* device
From: Giuseppe Sacco @ 2007-10-30 20:40 UTC (permalink / raw)
To: mips kernel list; +Cc: Martin Michlmayr
Hi all,
this is a patch that make ttyS0 and ttyS1 work on my SGI O2. I don't know if it is enough good for a general use since I am also changing code drivers/serial/serial_core.c. Probably the best solution would be to use mapbase instead of membase in arch/mips/sgi-ip32/ip32-platform.c.
Any comments?
Bye,
Giuseppe
---
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 7309e48..77febd6 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -42,7 +42,7 @@ static struct platform_device uart8250_device = {
static int __init uart8250_init(void)
{
uart8250_data[0].membase = (void __iomem *) &mace->isa.serial1;
- uart8250_data[1].membase = (void __iomem *) &mace->isa.serial1;
+ uart8250_data[1].membase = (void __iomem *) &mace->isa.serial2;
return platform_device_register(&uart8250_device);
}
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 3bb5d24..7caa877 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -2455,6 +2455,8 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
case UPIO_AU:
case UPIO_TSI:
case UPIO_DWAPB:
+ if (port1->mapbase==0 && port2->mapbase==0)
+ return (port1->membase == port2->membase);
return (port1->mapbase == port2->mapbase);
}
return 0;
^ permalink raw reply related
* Re: [IDE] Fix build bug
From: Bartlomiej Zolnierkiewicz @ 2007-10-30 20:30 UTC (permalink / raw)
To: Ralf Baechle
Cc: Denys Vlasenko, Andrew Morton, linux-kernel, linux-ide,
linux-mips, Martijn Uffing
In-Reply-To: <20071030124155.GA7582@linux-mips.org>
On Tuesday 30 October 2007, Ralf Baechle wrote:
> On Tue, Oct 30, 2007 at 11:34:29AM +0000, Denys Vlasenko wrote:
>
> > On Thursday 25 October 2007 22:41, Bartlomiej Zolnierkiewicz wrote:
> > > > -static const struct ide_port_info generic_chipsets[] __devinitdata = {
> > > > +static struct ide_port_info generic_chipsets[] __devinitdata = {
> > > > /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0),
> > > >
> > > > { /* 1 */
> > >
> > > I would prefer to not remove const from generic_chipsets[] so:
> > >
> > > [PATCH] drivers/ide/pci/generic: fix build for CONFIG_HOTPLUG=n
> > >
> > > It turns out that const and __{dev}initdata cannot be mixed currently
> > > and that generic IDE PCI host driver is also affected by the same issue:
> > >
> > > On Thursday 25 October 2007, Ralf Baechle wrote:
> > > > CC drivers/ide/pci/generic.o
> > > > drivers/ide/pci/generic.c:52: error: __setup_str_ide_generic_all_on causes a
> > > > +section type conflict
> > >
> > > [ Also reported by Martijn Uffing <mp3project@sarijopen.student.utwente.nl>. ]
> > >
> > > This patch workarounds the problem in a bit hackish way but without
> > > removing const from generic_chipsets[] (it adds const to __setup() so
> > > __setup_str_ide_generic_all becomes const).
> >
> > You wouldn't believe how much const data is not marked as const because
> > we don't have __constinitdata etc. Literally megabytes.
>
> The gain from marking it const is very little and once any non-const
> __initdata object is added to a compilation unit all other const declarations
> will have to be removed. Bad tradeoff.
In this case (struct ide_port_info) and probably few others having const
is important (maybe even more important than having __{dev}initdata since
majority of people use CONFIG_HOTPLUG=y) because it allows developers to
catch subtle yet hard to find bugs very early in the development process.
We had a few such cases in IDE - struct ide_port_info _template_ was being
modified because some quirk was needed for one version of the hardware which
was of course incorrect if another version of the hardware was also present
in the system.
Some other potential gains of using const like the better optimized code
or the protection of read-only kernel data are only an extra bonuses. :)
I agree that we need __const{dev}initdata but until then the workaround
that all __{dev}initdata must be const is an acceptable temporary solution
for IDE host drivers.
Thanks,
Bart
^ permalink raw reply
* Re: implementation of software suspend on MIPS.
From: Hyon Lim @ 2007-10-30 20:03 UTC (permalink / raw)
To: Uhler, Mike; +Cc: linux-mips
In-Reply-To: <692AB3595F5D76428B34B9BEFE20BC1FDD0219@Exchange.mips.com>
[-- Attachment #1: Type: text/plain, Size: 2683 bytes --]
Thank you very much. I think my work is first contribution about software
suspend on mips.
I cannot find any history related to my work on this list.
I'm looking forward to receiving your answer.
On 10/31/07, Uhler, Mike <uhler@mips.com> wrote:
>
> I've asked our software team to follow up with you on your questions.
>
>
> /gmu
> ---
> Michael Uhler, VP Architecture, Software and Platform Engineering
> MIPS Technologies, Inc. Email: uhler AT mips.com
> 1225 Charleston Road Voice: (650)567-5025
> Mountain View, CA 94043
>
>
>
>
> ------------------------------
> *From:* linux-mips-bounce@linux-mips.org [mailto:
> linux-mips-bounce@linux-mips.org] *On Behalf Of *Hyon Lim
> *Sent:* Tuesday, October 30, 2007 12:13 PM
> *To:* linux-mips@linux-mips.org
> *Subject:* implementation of software suspend on MIPS.
> *Importance:* Low
>
>
> Hello. I need a help for my implementation work on MIPS software
> suspend.
> From 3month ago, I've been coding software suspend(swsusp) on MIPS arch.
> I'm developing with MIPS32 4KEc embedded processor for digital appliance.
>
> Swsusp has two procedure. the one is suspending procedure and other one is
> resume procedure.
> Yesterday, I confirmed suspending procedure working.
> This is a porting guide of swsusp (
> http://tree.celinuxforum.org/CelfPubWiki/SwSuspendPortingNotes)
> I refered this article.
>
> The problem I faced is assembly language for MIPS.
> Of course, there are many manuals for this work but, I need a help from
> MIPS expert.
>
> This pseudo code should be implemented by MIPS asm.
>
> for (j = nr_copy_pages; j>0; j--) {
> src = pagedir_nosave[j].src;
> dst = pagedir_nosave[j].dst;
> for (i=0;i<1024;i++) {
> *dst++ = *src++;
> }
> }
>
> nr_copy_pages is unsigned long variable.
> and pagedir_nosave is a suspend_pagedir_t<http://lxr.linux.no/source/kernel/power/ident?v=2.6.10;i=suspend_pagedir_t>type structure array(pointer). (you can refer following url. Line 101. :
> http://lxr.linux.no/source/kernel/power/swsusp.c?v=2.6.10)
> code skeleton or useful material will be welcomed. (whatever you have.)
>
> The second problem is
> " which register should be prevented? "
>
> I saved $v0-v1. $a0-$a3. $t0-t7. $s0-s7. $t8-t9. $gp,sp,fp,ra.
>
> --
> Hyon Lim (임현)
> Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
> Fax. 032-232-0578 (Intl' Available)
> Homepage : http://www.alexlab.net
> Blog : http://www.alexlab.net/blog
>
>
--
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
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^ permalink raw reply
* RE: implementation of software suspend on MIPS.
From: Uhler, Mike @ 2007-10-30 19:55 UTC (permalink / raw)
To: Hyon Lim, linux-mips
In-Reply-To: <dd7dc2bc0710301212s7b364392n39a149764a4117cf@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2246 bytes --]
I've asked our software team to follow up with you on your questions.
/gmu
---
Michael Uhler, VP Architecture, Software and Platform Engineering
MIPS Technologies, Inc. Email: uhler AT mips.com
1225 Charleston Road Voice: (650)567-5025
Mountain View, CA 94043
________________________________
From: linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Hyon Lim
Sent: Tuesday, October 30, 2007 12:13 PM
To: linux-mips@linux-mips.org
Subject: implementation of software suspend on MIPS.
Importance: Low
Hello. I need a help for my implementation work on MIPS software suspend.
From 3month ago, I've been coding software suspend(swsusp) on MIPS arch.
I'm developing with MIPS32 4KEc embedded processor for digital appliance.
Swsusp has two procedure. the one is suspending procedure and other one is resume procedure.
Yesterday, I confirmed suspending procedure working.
This is a porting guide of swsusp (http://tree.celinuxforum.org/CelfPubWiki/SwSuspendPortingNotes)
I refered this article.
The problem I faced is assembly language for MIPS.
Of course, there are many manuals for this work but, I need a help from MIPS expert.
This pseudo code should be implemented by MIPS asm.
for (j = nr_copy_pages; j>0; j--) {
src = pagedir_nosave[j].src;
dst = pagedir_nosave[j].dst;
for (i=0;i<1024;i++) {
*dst++ = *src++;
}
}
nr_copy_pages is unsigned long variable.
and pagedir_nosave is a suspend_pagedir_t <http://lxr.linux.no/source/kernel/power/ident?v=2.6.10;i=suspend_pagedir_t> type structure array(pointer). (you can refer following url. Line 101. : http://lxr.linux.no/source/kernel/power/swsusp.c?v=2.6.10)
code skeleton or useful material will be welcomed. (whatever you have.)
The second problem is
" which register should be prevented? "
I saved $v0-v1. $a0-$a3. $t0-t7. $s0-s7. $t8-t9. $gp,sp,fp,ra.
--
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
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^ permalink raw reply
* RE: implementation of software suspend on MIPS.
From: Uhler, Mike @ 2007-10-30 19:55 UTC (permalink / raw)
To: Hyon Lim, linux-mips
In-Reply-To: <dd7dc2bc0710301212s7b364392n39a149764a4117cf@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2246 bytes --]
I've asked our software team to follow up with you on your questions.
/gmu
---
Michael Uhler, VP Architecture, Software and Platform Engineering
MIPS Technologies, Inc. Email: uhler AT mips.com
1225 Charleston Road Voice: (650)567-5025
Mountain View, CA 94043
________________________________
From: linux-mips-bounce@linux-mips.org [mailto:linux-mips-bounce@linux-mips.org] On Behalf Of Hyon Lim
Sent: Tuesday, October 30, 2007 12:13 PM
To: linux-mips@linux-mips.org
Subject: implementation of software suspend on MIPS.
Importance: Low
Hello. I need a help for my implementation work on MIPS software suspend.
From 3month ago, I've been coding software suspend(swsusp) on MIPS arch.
I'm developing with MIPS32 4KEc embedded processor for digital appliance.
Swsusp has two procedure. the one is suspending procedure and other one is resume procedure.
Yesterday, I confirmed suspending procedure working.
This is a porting guide of swsusp (http://tree.celinuxforum.org/CelfPubWiki/SwSuspendPortingNotes)
I refered this article.
The problem I faced is assembly language for MIPS.
Of course, there are many manuals for this work but, I need a help from MIPS expert.
This pseudo code should be implemented by MIPS asm.
for (j = nr_copy_pages; j>0; j--) {
src = pagedir_nosave[j].src;
dst = pagedir_nosave[j].dst;
for (i=0;i<1024;i++) {
*dst++ = *src++;
}
}
nr_copy_pages is unsigned long variable.
and pagedir_nosave is a suspend_pagedir_t <http://lxr.linux.no/source/kernel/power/ident?v=2.6.10;i=suspend_pagedir_t> type structure array(pointer). (you can refer following url. Line 101. : http://lxr.linux.no/source/kernel/power/swsusp.c?v=2.6.10)
code skeleton or useful material will be welcomed. (whatever you have.)
The second problem is
" which register should be prevented? "
I saved $v0-v1. $a0-$a3. $t0-t7. $s0-s7. $t8-t9. $gp,sp,fp,ra.
--
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
[-- Attachment #2: Type: text/html, Size: 4171 bytes --]
^ permalink raw reply
* implementation of software suspend on MIPS. (system log)
From: Hyon Lim @ 2007-10-30 19:15 UTC (permalink / raw)
To: linux-mips
[-- Attachment #1: Type: text/plain, Size: 895 bytes --]
[DEBUG] Swsusp_write() @ kernel/power/swsusp.c,874
[DEBUG] write_suspend_image(), kernel/power/swsusp.c,407
[DEBUG] init_header(), kernel/power/swsusp.c,337
[DEBUG] dump_info(), kernel/power/swsusp.c,321
swsusp: Version: 132618
swsusp: Num Pages: 8192
swsusp: UTS Sys: Linux
swsusp: UTS Node: (none)
swsusp: UTS Release: 2.6.10_SELP_MIPS
swsusp: UTS Version: #95 Wed Oct 30 03:46:35 KST 2007
swsusp: UTS Machine: mips
swsusp: UTS Domain: (none)
swsusp: CPUs: 1
swsusp: Image: 1896 Pages
swsusp: Pagedir: 0 Pages
[DEBUG] data_write(), kernel/power/swsusp.c,303
Writing data to swap (1896 pages)... done
Writing pagedir (8 pages)
S|
Powering off system
Cold reset
This is system log of my implementation.
--
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
[-- Attachment #2: Type: text/html, Size: 1174 bytes --]
^ permalink raw reply
* implementation of software suspend on MIPS.
From: Hyon Lim @ 2007-10-30 19:12 UTC (permalink / raw)
To: linux-mips
[-- Attachment #1: Type: text/plain, Size: 1572 bytes --]
Hello. I need a help for my implementation work on MIPS software suspend.
From 3month ago, I've been coding software suspend(swsusp) on MIPS arch.
I'm developing with MIPS32 4KEc embedded processor for digital appliance.
Swsusp has two procedure. the one is suspending procedure and other one is
resume procedure.
Yesterday, I confirmed suspending procedure working.
This is a porting guide of swsusp (
http://tree.celinuxforum.org/CelfPubWiki/SwSuspendPortingNotes)
I refered this article.
The problem I faced is assembly language for MIPS.
Of course, there are many manuals for this work but, I need a help from MIPS
expert.
This pseudo code should be implemented by MIPS asm.
for (j = nr_copy_pages; j>0; j--) {
src = pagedir_nosave[j].src;
dst = pagedir_nosave[j].dst;
for (i=0;i<1024;i++) {
*dst++ = *src++;
}
}
nr_copy_pages is unsigned long variable.
and pagedir_nosave is a
suspend_pagedir_t<http://lxr.linux.no/source/kernel/power/ident?v=2.6.10;i=suspend_pagedir_t>type
structure array(pointer). (you can refer following url. Line 101. :
http://lxr.linux.no/source/kernel/power/swsusp.c?v=2.6.10)
code skeleton or useful material will be welcomed. (whatever you have.)
The second problem is
" which register should be prevented? "
I saved $v0-v1. $a0-$a3. $t0-t7. $s0-s7. $t8-t9. $gp,sp,fp,ra.
--
Hyon Lim (임현)
Mobile. 010-8212-1240 (Intl' Call : +82-10-8212-1240)
Fax. 032-232-0578 (Intl' Available)
Homepage : http://www.alexlab.net
Blog : http://www.alexlab.net/blog
[-- Attachment #2: Type: text/html, Size: 2576 bytes --]
^ permalink raw reply
* [PATCH] More time cleanup
From: Atsushi Nemoto @ 2007-10-30 16:21 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static. It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup. It is just a placeholder.
arch/mips/kernel/time.c | 57 ++++++-------------------------
arch/mips/qemu/q-irq.c | 1 +
include/asm-mips/time.h | 13 -------
3 files changed, 12 insertions(+), 59 deletions(-)
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 622379b..3284b9b 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -3,8 +3,7 @@
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
* Copyright (c) 2003, 2004 Maciej W. Rozycki
*
- * Common time service routines for MIPS machines. See
- * Documentation/mips/time.README.
+ * Common time service routines for MIPS machines.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -18,28 +17,17 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/param.h>
-#include <linux/profile.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/smp.h>
-#include <linux/kernel_stat.h>
#include <linux/spinlock.h>
-#include <linux/interrupt.h>
#include <linux/module.h>
-#include <linux/kallsyms.h>
-#include <asm/bootinfo.h>
-#include <asm/cache.h>
-#include <asm/compiler.h>
-#include <asm/cpu.h>
#include <asm/cpu-features.h>
#include <asm/div64.h>
-#include <asm/sections.h>
#include <asm/smtc_ipi.h>
#include <asm/time.h>
-#include <irq.h>
-
/*
* forward reference
*/
@@ -63,14 +51,6 @@ int update_persistent_clock(struct timespec now)
}
/*
- * Null high precision timer functions for systems lacking one.
- */
-static cycle_t null_hpt_read(void)
-{
- return 0;
-}
-
-/*
* High precision timer functions for a R4k-compatible timer.
*/
static cycle_t c0_hpt_read(void)
@@ -104,6 +84,13 @@ EXPORT_SYMBOL(perf_irq);
unsigned int mips_hpt_frequency;
+static struct clocksource clocksource_mips = {
+ .name = "MIPS",
+ .read = c0_hpt_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
static unsigned int __init calibrate_hpt(void)
{
cycle_t frequency, hpt_start, hpt_end, hpt_count, hz;
@@ -146,12 +133,6 @@ static unsigned int __init calibrate_hpt(void)
return frequency >> log_2_loops;
}
-struct clocksource clocksource_mips = {
- .name = "MIPS",
- .mask = CLOCKSOURCE_MASK(32),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
{
u64 temp;
@@ -187,9 +168,6 @@ void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
static void __init init_mips_clocksource(void)
{
- if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
- return;
-
/* Calclate a somewhat reasonable rating value */
clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
@@ -211,7 +189,7 @@ void __init __weak plat_time_init(void)
* setup_irq calls and each clock_event_device should use its own
* struct irqrequest.
*/
-void __init plat_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(void)
{
BUG();
}
@@ -220,21 +198,8 @@ void __init time_init(void)
{
plat_time_init();
- /* Choose appropriate high precision timer routines. */
- if (!cpu_has_counter && !clocksource_mips.read)
- /* No high precision timer -- sorry. */
- clocksource_mips.read = null_hpt_read;
- else if (!mips_hpt_frequency && !mips_timer_state) {
- /* A high precision timer of unknown frequency. */
- if (!clocksource_mips.read)
- /* No external high precision timer -- use R4k. */
- clocksource_mips.read = c0_hpt_read;
- } else {
+ if (cpu_has_counter && (mips_hpt_frequency || mips_timer_state)) {
/* We know counter frequency. Or we can get it. */
- if (!clocksource_mips.read) {
- /* No external high precision timer -- use R4k. */
- clocksource_mips.read = c0_hpt_read;
- }
if (!mips_hpt_frequency)
mips_hpt_frequency = calibrate_hpt();
@@ -242,8 +207,8 @@ void __init time_init(void)
printk("Using %u.%03u MHz high precision timer.\n",
((mips_hpt_frequency + 500) / 1000) / 1000,
((mips_hpt_frequency + 500) / 1000) % 1000);
+ init_mips_clocksource();
}
- init_mips_clocksource();
mips_clockevent_init();
}
diff --git a/arch/mips/qemu/q-irq.c b/arch/mips/qemu/q-irq.c
index 4681757..11f9847 100644
--- a/arch/mips/qemu/q-irq.c
+++ b/arch/mips/qemu/q-irq.c
@@ -1,4 +1,5 @@
#include <linux/init.h>
+#include <linux/interrupt.h>
#include <linux/linkage.h>
#include <asm/i8259.h>
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index a45f24a..ee1663e 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -10,15 +10,10 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- * Please refer to Documentation/mips/time.README.
*/
#ifndef _ASM_TIME_H
#define _ASM_TIME_H
-#include <linux/interrupt.h>
-#include <linux/linkage.h>
-#include <linux/ptrace.h>
#include <linux/rtc.h>
#include <linux/spinlock.h>
#include <linux/clockchips.h>
@@ -38,20 +33,12 @@ extern int rtc_mips_set_mmss(unsigned long);
/*
* Timer interrupt functions.
* mips_timer_state is needed for high precision timer calibration.
- * mips_timer_ack may be NULL if the interrupt is self-recoverable.
*/
extern int (*mips_timer_state)(void);
/*
- * High precision timer clocksource.
- * If .read is NULL, an R4k-compatible timer setup is attempted.
- */
-extern struct clocksource clocksource_mips;
-
-/*
* board specific routines required by time_init().
*/
-struct irqaction;
extern void plat_time_init(void);
/*
^ permalink raw reply related
* Re: 2.4.24-rc1 does not boot on SGI
From: J. Scott Kasten @ 2007-10-30 13:09 UTC (permalink / raw)
To: Giuseppe Sacco; +Cc: linux-mips
In-Reply-To: <1193744519.7731.48.camel@scarafaggio>
On Tue, 30 Oct 2007, Giuseppe Sacco wrote:
>> the closet and took care of it that way. It sounds like the generic
>> serial stuff was broken a ways back.
>
> Using 2.6.18 debian kernel I hadn't any problem: the machine used to be
> a faxserver with hylafax (using a modem via the serial port).
>
> What kind of problem do you had with 2.6.18?
>
Well, hmm... That's good to know you had it working. I'll check into it
again. I hooked the serial device up, fired up minicom and couldn't get
any characters comming back. Verified the line settings and all too.
Finally tried the laptop, using the same cable, and all was fine.
To be honest, it wasn't entirely debian's kernel. It was their source
package, but I rebuilt with USB support. When I get a chance, I'll look
at this again.
-S-
^ permalink raw reply
* Re: 2.4.24-rc1 does not boot on SGI
From: Ralf Baechle @ 2007-10-30 12:48 UTC (permalink / raw)
To: Martin Michlmayr; +Cc: Giuseppe Sacco, linux-mips
In-Reply-To: <20071030083106.GA16763@deprecation.cyrius.com>
On Tue, Oct 30, 2007 at 09:31:07AM +0100, Martin Michlmayr wrote:
> * Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org> [2007-10-27 09:07]:
> > The new kernel once again does not boot on SGI O2. What happens is that
> > arcboot write its messages and nothing more is displayed on the screen.
> > The last message is "Starting ELF64 kernel". The previous running kernel
> > were 2.6.23 from linux-mips.org and 2.6.23.1 from kernel.org.
>
> I can confirm that currnt git doesn't boot (no message on the serial
> console at all). However, I'm curious to know whether 2.6.23 is
> working properly for you (and, if so, can you send me your .config).
> For me, it stops after printing
>
> Freeing unused kernel memory: 268k freed
>
> but then I can still hear it doing something and after a minute or so
> I see:
>
> Adding 131064k swap on /dev/sda2. Priority:-1 extents:1 across:131064k
> EXT3 FS on sda1, internal journal
>
> and later:
>
> gbefb: wait for vpixen_off timed out
>
> and then I gave up and went to bed. ;-)
There was bug in the timer code resuling in a hang on master. Commit
5a8e84c525ee1ad17e0ccfbc0a81c19b6773837c fixes this issue.
Irritatingly there was also a bug in Qemu which when running a Malta
kernel will cancel the affect of the first bug and result in a working
Malta kernel. But only on Qemu, not on actual hardware. Ths is working
on a fix for this one.
With the help of ricmm I found a few more issues in the IP32 interrupt
code. I have a preliminary fix but it either isn't all it takes to fix
IP32 or it is still broken itself.
Ralf
^ permalink raw reply
* Re: [IDE] Fix build bug
From: Ralf Baechle @ 2007-10-30 12:41 UTC (permalink / raw)
To: Denys Vlasenko
Cc: Bartlomiej Zolnierkiewicz, Andrew Morton, linux-kernel, linux-ide,
linux-mips, Martijn Uffing
In-Reply-To: <200710301134.30087.vda.linux@googlemail.com>
On Tue, Oct 30, 2007 at 11:34:29AM +0000, Denys Vlasenko wrote:
> On Thursday 25 October 2007 22:41, Bartlomiej Zolnierkiewicz wrote:
> > > -static const struct ide_port_info generic_chipsets[] __devinitdata = {
> > > +static struct ide_port_info generic_chipsets[] __devinitdata = {
> > > /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0),
> > >
> > > { /* 1 */
> >
> > I would prefer to not remove const from generic_chipsets[] so:
> >
> > [PATCH] drivers/ide/pci/generic: fix build for CONFIG_HOTPLUG=n
> >
> > It turns out that const and __{dev}initdata cannot be mixed currently
> > and that generic IDE PCI host driver is also affected by the same issue:
> >
> > On Thursday 25 October 2007, Ralf Baechle wrote:
> > > CC drivers/ide/pci/generic.o
> > > drivers/ide/pci/generic.c:52: error: __setup_str_ide_generic_all_on causes a
> > > +section type conflict
> >
> > [ Also reported by Martijn Uffing <mp3project@sarijopen.student.utwente.nl>. ]
> >
> > This patch workarounds the problem in a bit hackish way but without
> > removing const from generic_chipsets[] (it adds const to __setup() so
> > __setup_str_ide_generic_all becomes const).
>
> You wouldn't believe how much const data is not marked as const because
> we don't have __constinitdata etc. Literally megabytes.
The gain from marking it const is very little and once any non-const
__initdata object is added to a compilation unit all other const declarations
will have to be removed. Bad tradeoff.
Ralf
^ permalink raw reply
* Re: About the changes in co_timer_ack() function of time.c.
From: Ralf Baechle @ 2007-10-30 12:35 UTC (permalink / raw)
To: Kevin D. Kissell; +Cc: tnishioka, linux-mips
In-Reply-To: <003801c818c4$1cbe0150$8603a8c0@Ulysses>
On Sat, Oct 27, 2007 at 11:06:34AM -0700, Kevin D. Kissell wrote:
> The difference is that, in the case where we are *way* behind in interrupt
> processing, such that the Count value has gone beyond the to the next tick
> interrupt value, the 2.6.10 code will only try to catch up by a single inteval,
> which may result in having to wait 4 billion cycles for the Count to wrap.
> The 2.6.23.1 version (a) repeats until the programmed Compare value is
> ahead of Count, and (b) resamples the count register value each time
> through the loop, which is important if other interrupts may be enabled
> while c0_timer_ack() is running, [...]
The code upto 2.6.23 uses IRQF_DISABLED (which used to be named SA_INTERRUPT
until July 2006) for the timer interrupt in timer_irqaction which is defined
in the generic time.c.
> [...] I could imagine that making a material difference in the presnece
> of "interrupt storms" from I/O devices.
I don't recall any reports of this sort of behaviour before tnishioka's.
This includes no hang reports about the R4000 read from c0_count ever -
because Linux will happen to just nicely tiptoe around the issue for all
real world configurations.
> If I wanted to be pendantic, I would argue that the 2.6.23 is still vulnerable
> to the Count register passing the Compare target between the "if" and the
> write_c0_compare(), and that it would be more airtight to code it more
> like:
> expirelo = read_c0_count();
> do {
> expirelo += cycles_per_jiffy;
> write_c0_compare(expirelo);
> } while (((read_c0_count()) - expirelo < 0x7fffffff);
>
>
> It may well be that the initial value of expirelo should be derived
> from read_c0_compare() and not read_c0_count(). That would
> preserve synchronization of clock ticks against external wall-clock time,
> though the removal of the "slop" would mean that there would be
> slighly more interrupt service events per unit of real time.
I think it should be based on the last compare value. This is the only
way to ensure interrupts will use a precise timing.
> But I gave up tilting at these windmills a long, long time ago... ;o)
Your windmill has been fixed for 2.6.24.
Now available at your nearest LMO (TM) GIT Store!
The big change is that the new timer code now has a proper concept of
oneshot interrupt timers. Which is what the compare interrupt really is
despite the continuously running counter. So this is how the new event
programming code looks like:
static int mips_next_event(unsigned long delta,
struct clock_event_device *evt)
{
unsigned int cnt;
int res;
cnt = read_c0_count();
cnt += delta;
write_c0_compare(cnt);
return ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
}
The called will check for the error return and if so invoke the active
clockevent device's ->set_next_event method again with a new suitable
delta.
Qemu btw. can trigger the -ETIME case fairly easily.
But anyway, I don't object a patch to improve theoretical correctness.
Ralf
^ permalink raw reply
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