* Re: [patch] pnx8xxx clocksource cleanups
From: Vitaly Wool @ 2008-01-12 20:40 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: ralf, linux-mips
In-Reply-To: <4788F6FE.6000803@ru.mvista.com>
> > +static inline void timer_ack(void)
> > +{
> > + write_c0_compare(cpj);
> > +}
>
> I still don't understand why you need this function at all, and the 'cpj'
> variable as well -- clockevents core will set the comparator to a needed
> value. Also, I don't see much value in moving that function...
Well, it's explicitly made inline and it has been moved closer to the
calling function.
Vitaly
^ permalink raw reply
* Re: [patch] pnx8xxx clocksource cleanups
From: Sergei Shtylyov @ 2008-01-12 17:21 UTC (permalink / raw)
To: Vitaly Wool; +Cc: ralf, linux-mips
In-Reply-To: <4788BAAC.3020908@gmail.com>
Hello.
Vitaly Wool wrote:
> This patch does some PNX8XXX clocksource cleanups.
> Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
> Index: linux-mips.git/arch/mips/philips/pnx8550/common/time.c
> ===================================================================
> --- linux-mips.git.orig/arch/mips/philips/pnx8550/common/time.c
> +++ linux-mips.git/arch/mips/philips/pnx8550/common/time.c
> @@ -47,11 +47,6 @@ static struct clocksource pnx_clocksourc
> .flags = CLOCK_SOURCE_IS_CONTINUOUS,
> };
>
> -static void timer_ack(void)
> -{
> - write_c0_compare(cpj);
> -}
> -
> static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id)
> {
> struct clock_event_device *c = dev_id;
> @@ -94,30 +89,22 @@ static struct clock_event_device pnx8xxx
> .set_next_event = pnx8xxx_set_next_event,
> };
>
> -/*
> - * plat_time_init() - it does the following things:
> - *
> - * 1) plat_time_init() -
> - * a) (optional) set up RTC routines,
> - * b) (optional) calibrate and set the mips_hpt_frequency
> - * (only needed if you intended to use cpu counter as timer
> interrupt
> - * source)
> - */
> +static inline void timer_ack(void)
> +{
> + write_c0_compare(cpj);
> +}
I still don't understand why you need this function at all, and the 'cpj'
variable as well -- clockevents core will set the comparator to a needed
value. Also, I don't see much value in moving that function...
WBR, Sergei
^ permalink raw reply
* [PATCH][MIPS]: AR7 GPIO
From: Matteo Croce @ 2008-01-12 17:18 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: linux-mips, florian, nbd, ejka, nico, ralf, akpm
This new patch caches addresses as suggested by Atsushi Nemoto
Signed-off-by: Matteo Croce <technoboy85@gmail.com>
Signed-off-by: Nicolas Thill <nico@openwrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index ef1ed5d..307b8c8 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -904,6 +904,15 @@ config MWAVE
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 07304d5..15b479d 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -89,6 +89,7 @@ obj-$(CONFIG_COBALT_LCD) += lcd.o
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o
diff --git a/drivers/char/ar7_gpio.c b/drivers/char/ar7_gpio.c
new file mode 100644
index 0000000..16460cd
--- /dev/null
+++ b/drivers/char/ar7_gpio.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/types.h>
+#include <linux/cdev.h>
+#include <gpio.h>
+
+#define DRVNAME "ar7_gpio"
+#define LONGNAME "TI AR7 GPIOs Driver"
+
+MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
+MODULE_DESCRIPTION(LONGNAME);
+MODULE_LICENSE("GPL");
+
+static int ar7_gpio_major;
+
+static ssize_t ar7_gpio_write(struct file *file, const char __user *buf,
+ size_t len, loff_t *ppos)
+{
+ int pin = iminor(file->f_dentry->d_inode);
+ size_t i;
+
+ for (i = 0; i < len; ++i) {
+ char c;
+ if (get_user(c, buf + i))
+ return -EFAULT;
+ switch (c) {
+ case '0':
+ gpio_set_value(pin, 0);
+ break;
+ case '1':
+ gpio_set_value(pin, 1);
+ break;
+ case 'd':
+ case 'D':
+ ar7_gpio_disable(pin);
+ break;
+ case 'e':
+ case 'E':
+ ar7_gpio_enable(pin);
+ break;
+ case 'i':
+ case 'I':
+ case '<':
+ gpio_direction_input(pin);
+ break;
+ case 'o':
+ case 'O':
+ case '>':
+ gpio_direction_output(pin, 0);
+ break;
+ default:
+ return -EINVAL;
+ }
+ }
+
+ return len;
+}
+
+static ssize_t ar7_gpio_read(struct file *file, char __user *buf,
+ size_t len, loff_t *ppos)
+{
+ int pin = iminor(file->f_dentry->d_inode);
+ int value;
+
+ value = gpio_get_value(pin);
+ if (put_user(value ? '1' : '0', buf))
+ return -EFAULT;
+
+ return 1;
+}
+
+static int ar7_gpio_open(struct inode *inode, struct file *file)
+{
+ int m = iminor(inode);
+
+ if (m >= AR7_GPIO_MAX)
+ return -EINVAL;
+
+ return nonseekable_open(inode, file);
+}
+
+static int ar7_gpio_release(struct inode *inode, struct file *file)
+{
+ return 0;
+}
+
+static const struct file_operations ar7_gpio_fops = {
+ .owner = THIS_MODULE,
+ .write = ar7_gpio_write,
+ .read = ar7_gpio_read,
+ .open = ar7_gpio_open,
+ .release = ar7_gpio_release,
+ .llseek = no_llseek,
+};
+
+static struct platform_device *ar7_gpio_device;
+
+static int __init ar7_gpio_init(void)
+{
+ int rc;
+
+ ar7_gpio_device = platform_device_alloc(DRVNAME, -1);
+ if (!ar7_gpio_device)
+ return -ENOMEM;
+
+ rc = platform_device_add(ar7_gpio_device);
+ if (rc < 0)
+ goto out_put;
+
+ rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops);
+ if (rc < 0)
+ goto out_put;
+
+ ar7_gpio_major = rc;
+
+ rc = 0;
+
+ goto out;
+
+out_put:
+ platform_device_put(ar7_gpio_device);
+out:
+ return rc;
+}
+
+static void __exit ar7_gpio_exit(void)
+{
+ unregister_chrdev(ar7_gpio_major, DRVNAME);
+ platform_device_unregister(ar7_gpio_device);
+}
+
+module_init(ar7_gpio_init);
+module_exit(ar7_gpio_exit);
diff --git a/include/asm-mips/ar7/gpio.h b/include/asm-mips/ar7/gpio.h
new file mode 100644
index 0000000..cc6f898
--- /dev/null
+++ b/include/asm-mips/ar7/gpio.h
@@ -0,0 +1,117 @@
+/*
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __AR7_GPIO_H__
+#define __AR7_GPIO_H__
+#include <asm/ar7/ar7.h>
+
+#define AR7_GPIO_MAX 32
+
+extern int gpio_request(unsigned gpio, const char *label);
+extern void gpio_free(unsigned gpio);
+
+/* Common GPIO layer */
+static inline int gpio_get_value(unsigned gpio)
+{
+ static unsigned addr;
+
+ if (!addr) {
+ void __iomem *gpio_in = (void __iomem *)
+ KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
+ addr = readl(gpio_in);
+ }
+
+ return addr & (1 << gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+ static void __iomem *gpio_out;
+ unsigned tmp;
+
+ if (!gpio_out)
+ gpio_out = (void __iomem *)
+ KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
+
+ tmp = readl(gpio_out) & ~(1 << gpio);
+ if (value)
+ tmp |= 1 << gpio;
+ writel(tmp, gpio_out);
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+ void __iomem *gpio_dir =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+
+ if (gpio >= AR7_GPIO_MAX)
+ return -EINVAL;
+
+ writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
+
+ return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+ void __iomem *gpio_dir =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+
+ if (gpio >= AR7_GPIO_MAX)
+ return -EINVAL;
+
+ gpio_set_value(gpio, value);
+ writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir);
+
+ return 0;
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+ return -EINVAL;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+ return -EINVAL;
+}
+
+/* Board specific GPIO functions */
+static inline int ar7_gpio_enable(unsigned gpio)
+{
+ void __iomem *gpio_en =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+
+ writel(readl(gpio_en) | (1 << gpio), gpio_en);
+
+ return 0;
+}
+
+static inline int ar7_gpio_disable(unsigned gpio)
+{
+ void __iomem *gpio_en =
+ (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+
+ writel(readl(gpio_en) & ~(1 << gpio), gpio_en);
+
+ return 0;
+}
+
+#include <asm-generic/gpio.h>
+
+#endif
^ permalink raw reply related
* [patch] pnx8xxx clocksource cleanups
From: Vitaly Wool @ 2008-01-12 13:03 UTC (permalink / raw)
To: ralf, sshtylyov; +Cc: linux-mips
This patch does some PNX8XXX clocksource cleanups.
arch/mips/philips/pnx8550/common/time.c | 35 ++++++++++----------------------
1 file changed, 11 insertions(+), 24 deletions(-)
Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Index: linux-mips.git/arch/mips/philips/pnx8550/common/time.c
===================================================================
--- linux-mips.git.orig/arch/mips/philips/pnx8550/common/time.c
+++ linux-mips.git/arch/mips/philips/pnx8550/common/time.c
@@ -47,11 +47,6 @@ static struct clocksource pnx_clocksourc
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-static void timer_ack(void)
-{
- write_c0_compare(cpj);
-}
-
static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *c = dev_id;
@@ -94,30 +89,22 @@ static struct clock_event_device pnx8xxx
.set_next_event = pnx8xxx_set_next_event,
};
-/*
- * plat_time_init() - it does the following things:
- *
- * 1) plat_time_init() -
- * a) (optional) set up RTC routines,
- * b) (optional) calibrate and set the mips_hpt_frequency
- * (only needed if you intended to use cpu counter as timer interrupt
- * source)
- */
+static inline void timer_ack(void)
+{
+ write_c0_compare(cpj);
+}
__init void plat_time_init(void)
{
- unsigned int configPR;
- unsigned int n;
- unsigned int m;
- unsigned int p;
- unsigned int pow2p;
+ unsigned int configPR;
+ unsigned int n;
+ unsigned int m;
+ unsigned int p;
+ unsigned int pow2p;
clockevents_register_device(&pnx8xxx_clockevent);
clocksource_register(&pnx_clocksource);
- setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq);
- setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
-
/* Timer 1 start */
configPR = read_c0_config7();
configPR &= ~0x00000008;
@@ -158,6 +145,6 @@ __init void plat_time_init(void)
write_c0_count2(0);
write_c0_compare2(0xffffffff);
+ setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq);
+ setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
}
-
-
^ permalink raw reply
* Re: Toshiba JMR 3927 working setup?
From: Atsushi Nemoto @ 2008-01-12 12:17 UTC (permalink / raw)
To: gregor.waltz; +Cc: linux-mips
In-Reply-To: <4787AC3D.2020604@raritan.com>
On Fri, 11 Jan 2008 12:49:49 -0500, Gregor Waltz <gregor.waltz@raritan.com> wrote:
> I built linux-2.6.23.9 with the above, but the results are still the
> same and the EPC is not in System.map.
Are you searching the exact EPC value in System.map?
Usually you should find a function symbol which contains the EPC value in it.
Or you can do "mipsel-linux-objdump -d vmlinux" and search the EPC value.
> Exception! EPC=8005625c CAUSE=30000008(TLBL)
> 8005625c 8e020098 lw v0,152(s0) # 0x98
>
> I presume that 8e020098 is the full instruction, so I have tried
> searching for it in vmlinux.bin. The first occurrence is around 0x869b,
> which is more than 32k into the file. There is also nearly 1k worth of
> zero padding at the start of vmlinux.bin.
The 1k zero padding is normal. Please refer arch/mips/kernel/head.S.
---
Atsushi Nemoto
^ permalink raw reply
* Re: [PATCH] Fix ethernet interrupts for Cobalt RaQ1
From: Martin Michlmayr @ 2008-01-12 7:45 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: linux-mips, ralf
In-Reply-To: <20080112072702.GA10988@deprecation.cyrius.com>
* Martin Michlmayr <tbm@cyrius.com> [2008-01-12 08:27]:
> * Thomas Bogendoerfer <tsbogend@alpha.franken.de> [2008-01-12 00:25]:
> > RAQ1 uses the same interrupt routing as qube2.
> I guess should be "as qube1"?
Never mind, your comment is correct. Thanks for fixing this.
A lot of Debian users will be happy about this fix.
--
Martin Michlmayr
http://www.cyrius.com/
^ permalink raw reply
* Re: [PATCH] Fix ethernet interrupts for Cobalt RaQ1
From: Martin Michlmayr @ 2008-01-12 7:27 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: linux-mips, ralf
In-Reply-To: <20080111232514.64772C2F2A@solo.franken.de>
* Thomas Bogendoerfer <tsbogend@alpha.franken.de> [2008-01-12 00:25]:
> RAQ1 uses the same interrupt routing as qube2.
I guess should be "as qube1"?
> - if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
> + if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
--
Martin Michlmayr
http://www.cyrius.com/
^ permalink raw reply
* Re: [PATCH] Cobalt Qube1 has no serial port so don't use it
From: Yoichi Yuasa @ 2008-01-12 4:57 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: yoichi_yuasa, linux-mips, ralf
In-Reply-To: <20080111232517.C7B9FC2F2B@solo.franken.de>
On Sat, 12 Jan 2008 00:25:17 +0100 (CET)
Thomas Bogendoerfer <tsbogend@alpha.franken.de> wrote:
> Because Qube1 doesn't have a serial chip waiting for transmit fifo empty
> takes forever, which isn't a good idea. No prom_putchar/early console
> for Qube1 fixes this.
>
> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> ---
>
> arch/mips/cobalt/console.c | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
> index db330e8..d1ba701 100644
> --- a/arch/mips/cobalt/console.c
> +++ b/arch/mips/cobalt/console.c
> @@ -4,10 +4,15 @@
> #include <linux/io.h>
> #include <linux/serial_reg.h>
>
> +#include <cobalt.h>
> +
> #define UART_BASE ((void __iomem *)CKSEG1ADDR(0x1c800000))
>
> void prom_putchar(char c)
> {
> + if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
> + return;
> +
> while (!(readb(UART_BASE + UART_LSR) & UART_LSR_THRE))
> ;
>
>
^ permalink raw reply
* [PATCH] Fix ethernet interrupts for Cobalt RaQ1
From: Thomas Bogendoerfer @ 2008-01-11 23:25 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
RAQ1 uses the same interrupt routing as qube2.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/pci/fixup-cobalt.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index f7df114..9553b14 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -177,7 +177,7 @@ static char irq_tab_raq2[] __initdata = {
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
- if (cobalt_board_id < COBALT_BRD_ID_QUBE2)
+ if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
return irq_tab_qube1[slot];
if (cobalt_board_id == COBALT_BRD_ID_RAQ2)
^ permalink raw reply related
* [PATCH] Cobalt Qube1 has no serial port so don't use it
From: Thomas Bogendoerfer @ 2008-01-11 23:25 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
Because Qube1 doesn't have a serial chip waiting for transmit fifo empty
takes forever, which isn't a good idea. No prom_putchar/early console
for Qube1 fixes this.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/cobalt/console.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index db330e8..d1ba701 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -4,10 +4,15 @@
#include <linux/io.h>
#include <linux/serial_reg.h>
+#include <cobalt.h>
+
#define UART_BASE ((void __iomem *)CKSEG1ADDR(0x1c800000))
void prom_putchar(char c)
{
+ if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
+ return;
+
while (!(readb(UART_BASE + UART_LSR) & UART_LSR_THRE))
;
^ permalink raw reply related
* Re: Toshiba JMR 3927 working setup?
From: Gregor Waltz @ 2008-01-11 17:49 UTC (permalink / raw)
To: linux-mips
In-Reply-To: <20080106.000725.75184768.anemo@mba.ocn.ne.jp>
Atsushi Nemoto wrote:
> On Fri, 04 Jan 2008 13:40:46 -0500, Gregor Waltz <gregor.waltz@raritan.com> wrote:
>
>> sendRRQ vmlinux.bin
>> load linux length 0x34408a
>> Checking CRC on downloaded RAM image
>> /
>> CRC Check passed
>> Image Started At Address 0x80020000.
>> Image Length = 3424394 (0x34408a).
>> Exception! EPC=80056eb4 CAUSE=30000008(TLBL)
>> 80056eb4 8ce4000c lw a0,12(a3) # 0xc
>>
>
> Are you loading an ELF binary or a raw binary image? If your loader
> does not handle ELF headers, you should do some trick to start running
> your kernel at correct address.
>
> If you were using 2.6.23, CONFIG_BOOT_RAW might help you.
>
> But it seems CONFIG_BOOT_RAW is broken on current git again. It will
> be an another story... :-<
>
I tried setting CONFIG_BOOT_RAW to y in .config, but that did not help.
Are there any other tricks for loading an ELF image?
Is there any way to verify that ELF is the issue?
I will do some research on ELF and loaders.
It took me many trials and some research to build the following tools
for MIPS:
binutils-2.18
gcc-4.2.2
glibc-2.7
I include "ARCH=mips CROSS_COMPILE=mipsel-linux-gnu-" with each call of
make when working on the kernel. I did mrproper after unarchiving and I
used vmlinux followed by vmlinux.bin as build targets.
I built linux-2.6.23.9 with the above, but the results are still the
same and the EPC is not in System.map.
My problem does not appear to be a matter of tool versions.
Exception! EPC=8005625c CAUSE=30000008(TLBL)
8005625c 8e020098 lw v0,152(s0) # 0x98
I presume that 8e020098 is the full instruction, so I have tried
searching for it in vmlinux.bin. The first occurrence is around 0x869b,
which is more than 32k into the file. There is also nearly 1k worth of
zero padding at the start of vmlinux.bin.
Does anybody have any other suggestions for getting down to the bottom
of this problem?
Thank you
^ permalink raw reply
* Re: [PATCH] mips: picvue: pvc_sem semaphore to mutex
From: Brian Murphy @ 2008-01-11 17:22 UTC (permalink / raw)
To: Daniel Walker; +Cc: mingo, ralf, linux-mips
In-Reply-To: <20080111045348.085971795@mvista.com>
Daniel Walker wrote:
> This semaphore conforms to the new struct mutex, so I've converted it
> to use that new API.
>
> I also changed the name to pvc_mutex, and moved the define to the file
> it's used in which allows it to be static.
>
> Signed-off-by: Daniel Walker <dwalker@mvista.com>
>
>
Thanks.
/Brian
^ permalink raw reply
* Re: (Try #3) [Patch 2/8] MIPS: Remove 'TOPDIR' from Makefiles
From: Sam Ravnborg @ 2008-01-11 17:02 UTC (permalink / raw)
To: Ralf Baechle
Cc: WANG Cong, Andreas Schwab, LKML, linux-kbuild, Andrew Morton,
linux-mips
In-Reply-To: <20080111141754.GC19900@linux-mips.org>
On Fri, Jan 11, 2008 at 02:17:54PM +0000, Ralf Baechle wrote:
> On Wed, Jan 02, 2008 at 02:21:36PM +0800, WANG Cong wrote:
>
> > >> Shouldn't that use $(LINUXINCLUDE), or $(KBUILD_CPPFLAGS)?
> > >It would be better to use $(LINUXINCLUDE) as we then pull in all config
> > >symbols too and do not have to hardcode kbuild internal names (include2).
> >
> > OK. Refine this patch.
>
> LDSCRIPT also needed fixing to get builds in a separate object directory
> working again.
>
> I've applied below fix.
Great - I will drop it from my tree.
See small comment below.
Sam
> Ralf
>
> From 8babf06e1265214116fb8ffc634c04df85597c52 Mon Sep 17 00:00:00 2001
> From: WANG Cong <xiyou.wangcong@gmail.com>
> Date: Wed, 2 Jan 2008 14:21:36 +0800
> Subject: [PATCH] [MIPS] Lasat: Fix built in separate object directory.
>
> Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>
>
> [Ralf: The LDSCRIPT script needed fixing, too]
>
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
>
> diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile
> index 5332449..7ccd40d 100644
> --- a/arch/mips/lasat/image/Makefile
> +++ b/arch/mips/lasat/image/Makefile
> @@ -12,11 +12,11 @@ endif
>
> MKLASATIMG = mklasatimg
> MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
> -KERNEL_IMAGE = $(TOPDIR)/vmlinux
> +KERNEL_IMAGE = vmlinux
> KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
> KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
>
> -LDSCRIPT= -L$(obj) -Tromscript.normal
> +LDSCRIPT= -L$(srctree)/$(obj) -Tromscript.normal
This needs to read:
> +LDSCRIPT= -L$(srctree)/$(src) -Tromscript.normal
(There is no difference between src and obj in normal cases but to be consistent
it shuld be like above).
>
> HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
> -D_kernel_entry=0x$(KERNEL_ENTRY) \
> @@ -24,7 +24,7 @@ HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
> -D TIMESTAMP=$(shell date +%s)
>
> $(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
> - $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
> + $(CC) -fno-pic $(HEAD_DEFINES) $(LINUXINCLUDE) -c -o $@ $<
>
> OBJECTS = head.o kImage.o
>
^ permalink raw reply
* [PATCH] mips: fail if DMA coherency is unspecified
From: Paul Gortmaker @ 2008-01-11 16:09 UTC (permalink / raw)
To: linux-mips; +Cc: Paul Gortmaker
Currently, if the DMA coherency is unspecified, you simply get a
warning about no return in a function returning int, which can be
easily overlooked. This makes sure that if the platform hasn't
specified it, that it will get the required visibility.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
include/asm-mips/mach-generic/dma-coherence.h | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/include/asm-mips/mach-generic/dma-coherence.h b/include/asm-mips/mach-generic/dma-coherence.h
index 76e04e7..02492a6 100644
--- a/include/asm-mips/mach-generic/dma-coherence.h
+++ b/include/asm-mips/mach-generic/dma-coherence.h
@@ -34,11 +34,13 @@ static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
static inline int plat_device_is_coherent(struct device *dev)
{
-#ifdef CONFIG_DMA_COHERENT
+#if defined(CONFIG_DMA_COHERENT)
return 1;
-#endif
-#ifdef CONFIG_DMA_NONCOHERENT
+#elif defined(CONFIG_DMA_NONCOHERENT)
return 0;
+#else
+#error DMA coherency of platform is not defined.
+ return 0xbad;
#endif
}
--
1.5.0.rc1.gf4b6c
^ permalink raw reply related
* Re: Linux mips and DMA
From: Jon Dufresne @ 2008-01-11 16:08 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips
In-Reply-To: <20080110143142.GA13210@linux-mips.org>
> > > Hardware coherency for DMA is the exception for low-end embedded MIPS
> > > systems andgiven the CPU address your's is no exception from that.
> > >
> > > If your system was supporting hardware coherency for DMA I/O you would
> > > have obtained a cachable CPU address like:
> > >
> > > dma_handle=0x026f0000 size=0x00010000 cpu_addr=0x826f0000
> > > ^^^
> > >
> > > A 0x8??????? would be in KSEG0 so cachable.
> >
> > I do have a an embedded system. Are you saying that, in all likelyhood,
> > I do not have coherency? If I understand you correctly, this is a bad
> > thing right? Will I need to take extra care to work around this issue.
> >
> > So are you saying I would prefer a cpu_addr in the 0x8******* range?
>
> No. because you don't seem to have hw coherency.
So, the address I received is in uncachable memory, and therefore,
should look the same to all devices on the bus without hw cache
coherency?
>
> > If it is true that I don't have hardware coherency should I still be
> > using the pci_*_consistent api? Or should I switch to the
> > dma_*_noncoherent api? Also what extra steps do I need to take to get
> > this to work with a non-coherent system?
>
> What you were doing seemed to be the right thing. The API is supposed
> to do the necessary address conversion and cache flushes for the driver.
> That is the unchanged driver should work on any architecture.
Should I need to do any explicit cache flushes in my code for hardware
without cache coherency? If I wanted to do this what function should I
use?
> According to the current kernel code the PNX8550 non-coheren (aka software
> coherency).
Will this be a problem for what I'm trying to accomplish? That is dma on
a pci device.
Thanks,
Jon
^ permalink raw reply
* Re: [PATCH] mips: picvue: pvc_sem semaphore to mutex
From: Daniel Walker @ 2008-01-11 15:41 UTC (permalink / raw)
To: Ralf Baechle; +Cc: brian, mingo, linux-mips
In-Reply-To: <20080111123231.GB19900@linux-mips.org>
On Fri, 2008-01-11 at 12:32 +0000, Ralf Baechle wrote:
> On Thu, Jan 10, 2008 at 08:53:21PM -0800, Daniel Walker wrote:
> > From: Daniel Walker <dwalker@mvista.com>
> > Date: Thu, 10 Jan 2008 20:53:48 -0800
> > Date: Thu, 10 Jan 2008 20:53:21 -0800
>
> Btw, your email headers are looking slightly odd ;-)
Hmm .. Not sure how that happened .. Must be something in my quilt tho,
thanks for noticing it.
Daniel
^ permalink raw reply
* Re: (Try #3) [Patch 2/8] MIPS: Remove 'TOPDIR' from Makefiles
From: Ralf Baechle @ 2008-01-11 14:17 UTC (permalink / raw)
To: WANG Cong
Cc: Sam Ravnborg, Andreas Schwab, LKML, linux-kbuild, Andrew Morton,
linux-mips
In-Reply-To: <20080102062135.GE2493@hacking>
On Wed, Jan 02, 2008 at 02:21:36PM +0800, WANG Cong wrote:
> >> Shouldn't that use $(LINUXINCLUDE), or $(KBUILD_CPPFLAGS)?
> >It would be better to use $(LINUXINCLUDE) as we then pull in all config
> >symbols too and do not have to hardcode kbuild internal names (include2).
>
> OK. Refine this patch.
LDSCRIPT also needed fixing to get builds in a separate object directory
working again.
I've applied below fix.
Ralf
^ permalink raw reply
* Re: [PATCH] mips: picvue: pvc_sem semaphore to mutex
From: Ralf Baechle @ 2008-01-11 12:32 UTC (permalink / raw)
To: Daniel Walker; +Cc: brian, mingo, linux-mips
In-Reply-To: <20080111045321.274084894@mvista.com>
On Thu, Jan 10, 2008 at 08:53:21PM -0800, Daniel Walker wrote:
> From: Daniel Walker <dwalker@mvista.com>
> Date: Thu, 10 Jan 2008 20:53:48 -0800
> Date: Thu, 10 Jan 2008 20:53:21 -0800
Btw, your email headers are looking slightly odd ;-)
Ralf
^ permalink raw reply
* Re: [PATCH] mips: picvue: pvc_sem semaphore to mutex
From: Ralf Baechle @ 2008-01-11 12:32 UTC (permalink / raw)
To: Daniel Walker; +Cc: brian, mingo, linux-mips
In-Reply-To: <20080111045321.274084894@mvista.com>
On Thu, Jan 10, 2008 at 08:53:21PM -0800, Daniel Walker wrote:
> This semaphore conforms to the new struct mutex, so I've converted it
> to use that new API.
>
> I also changed the name to pvc_mutex, and moved the define to the file
> it's used in which allows it to be static.
Queued for 2.6.25, thanks.
Ralf
^ permalink raw reply
* Re: memory dump on mips
From: Andi @ 2008-01-11 12:30 UTC (permalink / raw)
To: linux-mips
In-Reply-To: <4783754D.8010007@gmx.net>
Hello,
we now figured out how to dump the memory at a certain address.
As I already said we want to create dump the kernel running on the
system. Unfortunately we don't know the "magic code" to look for in the
dump in order to find the starting position of the image.
I couldn't find a ".ELF" in the dump, so far.
Can you please point me to where I can find the right information how
such a kernel-image might look like?
Thank you very much in advance
Regards,
Andi
^ permalink raw reply
* Re: pnx8xxx: move to clocksource
From: Ralf Baechle @ 2008-01-10 21:50 UTC (permalink / raw)
To: Vitaly Wool; +Cc: Sergei Shtylyov, linux-mips
In-Reply-To: <acd2a5930801100848o36935a1al44c6b16eb746dcff@mail.gmail.com>
On Thu, Jan 10, 2008 at 07:48:57PM +0300, Vitaly Wool wrote:
> Sergei, I decided not to mix whitespace cleanups and the clocksource
> changes. I'll come up with the whitespace/tab fixups soon arranging it
> as a separate patch.
Generally that's a good approach - but for lines which are modified anyway
I see no reason not to clean the whitespace stuff anyway.
Ralf
^ permalink raw reply
* Re: [BUG][PATCH] fix broken software reset for Malta board
From: Ralf Baechle @ 2008-01-10 21:58 UTC (permalink / raw)
To: Dmitri Vorobiev; +Cc: linux-mips, Linux-kernel
In-Reply-To: <4782F180.7000104@gmail.com>
On Tue, Jan 08, 2008 at 06:44:00AM +0300, Dmitri Vorobiev wrote:
> I noticed that the commit f197465384bf7ef1af184c2ed1a4e268911a91e3
> (MIPS Tech: Get rid of volatile in core code) broke the software
> reset functionality for MIPS Malta boards in big-endian mode.
Thanks, applied.
Ralf
^ permalink raw reply
* Re: [PATCH] Add GPIO system button to MTX-1
From: Ralf Baechle @ 2008-01-10 22:08 UTC (permalink / raw)
To: Florian Fainelli; +Cc: linux-mips
In-Reply-To: <200801071900.46831.florian.fainelli@telecomint.eu>
On Mon, Jan 07, 2008 at 07:00:46PM +0100, Florian Fainelli wrote:
> This patch adds support for the GPIO connected system button on the MTX-1 boards. Default configuration is updated accordingly.
>
> Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Thanks, queued for 2.6.25.
Ralf
^ permalink raw reply
* Re: [PATCH][MIPS] Kconfig fixes for BCM47XX platform
From: Aurelien Jarno @ 2008-01-11 8:28 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips
In-Reply-To: <20071211103034.GA11972@hall.aurel32.net>
On Tue, Dec 11, 2007 at 11:30:34AM +0100, Aurelien Jarno wrote:
> Hi,
>
> The patch below fixes two problems for Kconfig on the BCM47xx platform:
> - arch/mips/bcm47xx/gpio.c uses ssb_extif_* functions. Selecting
> SSB_DRIVER_EXTIF makes sure those functions are available.
> - arch/mips/pci/pci.c needs, when enabled, platform specific functions,
> which are defined when SSB_PCICORE_HOSTMODE is enabled.
>
> This patch replaces the one called "Enable SSB_DRIVER_EXTIF on BCM47XX
> platform" posted yesterday.
>
> Aurelien
>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
>
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index c6fc405..b4ffcae 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -59,6 +59,8 @@ config BCM47XX
> select SYS_SUPPORTS_LITTLE_ENDIAN
> select SSB
> select SSB_DRIVER_MIPS
> + select SSB_DRIVER_EXTIF
> + select SSB_PCICORE_HOSTMODE if PCI
> select GENERIC_GPIO
> select SYS_HAS_EARLY_PRINTK
> select CFE
>
Any news about this patch?
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
^ permalink raw reply
* [PATCH] mips: picvue: pvc_sem semaphore to mutex
From: Daniel Walker @ 2008-01-11 4:53 UTC (permalink / raw)
To: brian; +Cc: mingo, ralf, linux-mips
This semaphore conforms to the new struct mutex, so I've converted it
to use that new API.
I also changed the name to pvc_mutex, and moved the define to the file
it's used in which allows it to be static.
Signed-off-by: Daniel Walker <dwalker@mvista.com>
---
arch/mips/lasat/picvue.c | 2 --
arch/mips/lasat/picvue.h | 3 ---
arch/mips/lasat/picvue_proc.c | 18 ++++++++++--------
3 files changed, 10 insertions(+), 13 deletions(-)
Index: linux-2.6.23/arch/mips/lasat/picvue.c
===================================================================
--- linux-2.6.23.orig/arch/mips/lasat/picvue.c
+++ linux-2.6.23/arch/mips/lasat/picvue.c
@@ -22,8 +22,6 @@
struct pvc_defs *picvue;
-DECLARE_MUTEX(pvc_sem);
-
static void pvc_reg_write(u32 val)
{
*picvue->reg = val;
Index: linux-2.6.23/arch/mips/lasat/picvue.h
===================================================================
--- linux-2.6.23.orig/arch/mips/lasat/picvue.h
+++ linux-2.6.23/arch/mips/lasat/picvue.h
@@ -4,8 +4,6 @@
* Brian Murphy <brian.murphy@eicon.com>
*
*/
-#include <asm/semaphore.h>
-
struct pvc_defs {
volatile u32 *reg;
u32 data_shift;
@@ -45,4 +43,3 @@ void pvc_move(u8 cmd);
void pvc_clear(void);
void pvc_home(void);
-extern struct semaphore pvc_sem;
Index: linux-2.6.23/arch/mips/lasat/picvue_proc.c
===================================================================
--- linux-2.6.23.orig/arch/mips/lasat/picvue_proc.c
+++ linux-2.6.23/arch/mips/lasat/picvue_proc.c
@@ -13,9 +13,11 @@
#include <linux/interrupt.h>
#include <linux/timer.h>
+#include <linux/mutex.h>
#include "picvue.h"
+static DEFINE_MUTEX(pvc_mutex);
static char pvc_lines[PVC_NLINES][PVC_LINELEN+1];
static int pvc_linedata[PVC_NLINES];
static struct proc_dir_entry *pvc_display_dir;
@@ -48,9 +50,9 @@ static int pvc_proc_read_line(char *page
return 0;
}
- down(&pvc_sem);
+ mutex_lock(&pvc_mutex);
page += sprintf(page, "%s\n", pvc_lines[lineno]);
- up(&pvc_sem);
+ mutex_unlock(&pvc_mutex);
return page - origpage;
}
@@ -73,10 +75,10 @@ static int pvc_proc_write_line(struct fi
if (buffer[count-1] == '\n')
count--;
- down(&pvc_sem);
+ mutex_lock(&pvc_mutex);
strncpy(pvc_lines[lineno], buffer, count);
pvc_lines[lineno][count] = '\0';
- up(&pvc_sem);
+ mutex_unlock(&pvc_mutex);
tasklet_schedule(&pvc_display_tasklet);
@@ -89,7 +91,7 @@ static int pvc_proc_write_scroll(struct
int origcount = count;
int cmd = simple_strtol(buffer, NULL, 10);
- down(&pvc_sem);
+ mutex_lock(&pvc_mutex);
if (scroll_interval != 0)
del_timer(&timer);
@@ -106,7 +108,7 @@ static int pvc_proc_write_scroll(struct
}
add_timer(&timer);
}
- up(&pvc_sem);
+ mutex_unlock(&pvc_mutex);
return origcount;
}
@@ -117,9 +119,9 @@ static int pvc_proc_read_scroll(char *pa
{
char *origpage = page;
- down(&pvc_sem);
+ mutex_lock(&pvc_mutex);
page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
- up(&pvc_sem);
+ mutex_unlock(&pvc_mutex);
return page - origpage;
}
--
--
^ permalink raw reply
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