* [PATCH v3 1/2] of_mtd: Add helpers to get ECC strength and ECC step size
2014-02-24 22:24 [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
@ 2014-02-24 22:24 ` Ezequiel Garcia
2014-02-24 22:24 ` [PATCH v3 2/2] mtd: nand: Add a devicetree binding for " Ezequiel Garcia
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Ezequiel Garcia @ 2014-02-24 22:24 UTC (permalink / raw)
To: linux-mtd; +Cc: Grant Likely, Brian Norris, Boris BREZILLON, Ezequiel Garcia
This commit adds simple helpers to obtain the devicetree properties
that specify the ECC strength and ECC step size to use on a given
NAND controller.
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
drivers/of/of_mtd.c | 34 ++++++++++++++++++++++++++++++++++
include/linux/of_mtd.h | 12 ++++++++++++
2 files changed, 46 insertions(+)
diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
index a27ec94..b7361ed 100644
--- a/drivers/of/of_mtd.c
+++ b/drivers/of/of_mtd.c
@@ -50,6 +50,40 @@ int of_get_nand_ecc_mode(struct device_node *np)
EXPORT_SYMBOL_GPL(of_get_nand_ecc_mode);
/**
+ * of_get_nand_ecc_step_size - Get ECC step size associated to
+ * the required ECC strength (see below).
+ * @np: Pointer to the given device_node
+ *
+ * return the ECC step size, or errno in error case.
+ */
+int of_get_nand_ecc_step_size(struct device_node *np)
+{
+ int ret;
+ u32 val;
+
+ ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
+ return ret ? ret : val;
+}
+EXPORT_SYMBOL_GPL(of_get_nand_ecc_step_size);
+
+/**
+ * of_get_nand_ecc_strength - Get required ECC strength over the
+ * correspnding step size as defined by 'nand-ecc-size'
+ * @np: Pointer to the given device_node
+ *
+ * return the ECC strength, or errno in error case.
+ */
+int of_get_nand_ecc_strength(struct device_node *np)
+{
+ int ret;
+ u32 val;
+
+ ret = of_property_read_u32(np, "nand-ecc-strength", &val);
+ return ret ? ret : val;
+}
+EXPORT_SYMBOL_GPL(of_get_nand_ecc_strength);
+
+/**
* of_get_nand_bus_width - Get nand bus witdh for given device_node
* @np: Pointer to the given device_node
*
diff --git a/include/linux/of_mtd.h b/include/linux/of_mtd.h
index cb32d9c..e266caa 100644
--- a/include/linux/of_mtd.h
+++ b/include/linux/of_mtd.h
@@ -13,6 +13,8 @@
#include <linux/of.h>
int of_get_nand_ecc_mode(struct device_node *np);
+int of_get_nand_ecc_step_size(struct device_node *np);
+int of_get_nand_ecc_strength(struct device_node *np);
int of_get_nand_bus_width(struct device_node *np);
bool of_get_nand_on_flash_bbt(struct device_node *np);
@@ -23,6 +25,16 @@ static inline int of_get_nand_ecc_mode(struct device_node *np)
return -ENOSYS;
}
+static inline int of_get_nand_ecc_step_size(struct device_node *np)
+{
+ return -ENOSYS;
+}
+
+static inline int of_get_nand_ecc_strength(struct device_node *np)
+{
+ return -ENOSYS;
+}
+
static inline int of_get_nand_bus_width(struct device_node *np)
{
return -ENOSYS;
--
1.8.1.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v3 2/2] mtd: nand: Add a devicetree binding for ECC strength and ECC step size
2014-02-24 22:24 [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
2014-02-24 22:24 ` [PATCH v3 1/2] of_mtd: Add helpers to get ECC strength and ECC step size Ezequiel Garcia
@ 2014-02-24 22:24 ` Ezequiel Garcia
2014-02-28 14:59 ` [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
2014-03-04 10:45 ` Gupta, Pekon
3 siblings, 0 replies; 6+ messages in thread
From: Ezequiel Garcia @ 2014-02-24 22:24 UTC (permalink / raw)
To: linux-mtd; +Cc: Grant Likely, Brian Norris, Boris BREZILLON, Ezequiel Garcia
Some flashes can only be properly accessed when the ECC mode is
specified, so a way to describe such mode is required.
Together, the ECC strength and step size define the correction capability,
so that we say we will correct "{strength} bit errors per {size} bytes".
The interpretation of these parameters is implementation-defined, but they
often have ramifications on the formation, interpretation, and placement of
correction metadata on the flash. Not all implementations must support all
possible combinations. Implementations are encouraged to further define the
value(s) they support.
Acked-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
---
Documentation/devicetree/bindings/mtd/nand.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt
index 03855c8..b53f92e 100644
--- a/Documentation/devicetree/bindings/mtd/nand.txt
+++ b/Documentation/devicetree/bindings/mtd/nand.txt
@@ -5,3 +5,17 @@
"soft_bch".
- nand-bus-width : 8 or 16 bus width if not present 8
- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
+
+- nand-ecc-strength: integer representing the number of bits to correct
+ per ECC step.
+
+- nand-ecc-step-size: integer representing the number of data bytes
+ that are covered by a single ECC step.
+
+The ECC strength and ECC step size properties define the correction capability
+of a controller. Together, they say a controller can correct "{strength} bit
+errors per {size} bytes".
+
+The interpretation of these parameters is implementation-defined, so not all
+implementations must support all possible combinations. However, implementations
+are encouraged to further specify the value(s) they support.
--
1.8.1.5
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v3 0/2] Add NAND ECC devicetree binding
2014-02-24 22:24 [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
2014-02-24 22:24 ` [PATCH v3 1/2] of_mtd: Add helpers to get ECC strength and ECC step size Ezequiel Garcia
2014-02-24 22:24 ` [PATCH v3 2/2] mtd: nand: Add a devicetree binding for " Ezequiel Garcia
@ 2014-02-28 14:59 ` Ezequiel Garcia
2014-03-05 8:20 ` Brian Norris
2014-03-04 10:45 ` Gupta, Pekon
3 siblings, 1 reply; 6+ messages in thread
From: Ezequiel Garcia @ 2014-02-28 14:59 UTC (permalink / raw)
To: linux-mtd; +Cc: Grant Likely, Brian Norris, Boris BREZILLON
On Mon, Feb 24, 2014 at 07:24:47PM -0300, Ezequiel Garcia wrote:
> Third round, fixing a stupid semi-colon miss.
>
> NAND controllers have special ECC modes, raising per-driver ECC mode devicetree
> binding. See for instance the binding for OMAP:
>
> - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
> "sw" <deprecated> use "ham1" instead
> "hw" <deprecated> use "ham1" instead
> "hw-romcode" <deprecated> use "ham1" instead
> "ham1" 1-bit Hamming ecc code
> "bch4" 4-bit BCH ecc code
> "bch8" 8-bit BCH ecc code
>
> Other drivers (such as pxa3xx-nand) have similar requirements, with special
> (controller-specific) ECC modes. Instead of adding a possibly different
> binding per compatible-string, let's add generic ECC strength and ECC step size.
>
> This properties aim at providing a complete description of the required ECC
> correction to let drivers choose the appropriate ECC mode.
>
> Changes from v2:
>
> * Added a missing semi-colon.
>
> Changes from v1:
>
> * Improve the binding documentation, as per Brian Norris' suggestions.
>
> * Added the helper functions.
>
> Ezequiel Garcia (2):
> of_mtd: Add helpers to get ECC strength and ECC step size
> mtd: nand: Add a devicetree binding for ECC strength and ECC step size
>
> Documentation/devicetree/bindings/mtd/nand.txt | 14 +++++++++++
> drivers/of/of_mtd.c | 34 ++++++++++++++++++++++++++
> include/linux/of_mtd.h | 12 +++++++++
> 3 files changed, 60 insertions(+)
>
Brian? Any chance this lands on v3.15?
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 0/2] Add NAND ECC devicetree binding
2014-02-28 14:59 ` [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
@ 2014-03-05 8:20 ` Brian Norris
0 siblings, 0 replies; 6+ messages in thread
From: Brian Norris @ 2014-03-05 8:20 UTC (permalink / raw)
To: Ezequiel Garcia; +Cc: Grant Likely, Boris BREZILLON, linux-mtd
On Fri, Feb 28, 2014 at 11:59:24AM -0300, Ezequiel Garcia wrote:
> On Mon, Feb 24, 2014 at 07:24:47PM -0300, Ezequiel Garcia wrote:
> > Third round, fixing a stupid semi-colon miss.
> >
> > NAND controllers have special ECC modes, raising per-driver ECC mode devicetree
> > binding. See for instance the binding for OMAP:
> >
> > - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
> > "sw" <deprecated> use "ham1" instead
> > "hw" <deprecated> use "ham1" instead
> > "hw-romcode" <deprecated> use "ham1" instead
> > "ham1" 1-bit Hamming ecc code
> > "bch4" 4-bit BCH ecc code
> > "bch8" 8-bit BCH ecc code
> >
> > Other drivers (such as pxa3xx-nand) have similar requirements, with special
> > (controller-specific) ECC modes. Instead of adding a possibly different
> > binding per compatible-string, let's add generic ECC strength and ECC step size.
> >
> > This properties aim at providing a complete description of the required ECC
> > correction to let drivers choose the appropriate ECC mode.
> >
[...]
>
> Brian? Any chance this lands on v3.15?
Pushed to l2-mtd.git. Thanks!
Brian
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v3 0/2] Add NAND ECC devicetree binding
2014-02-24 22:24 [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
` (2 preceding siblings ...)
2014-02-28 14:59 ` [PATCH v3 0/2] Add NAND ECC devicetree binding Ezequiel Garcia
@ 2014-03-04 10:45 ` Gupta, Pekon
3 siblings, 0 replies; 6+ messages in thread
From: Gupta, Pekon @ 2014-03-04 10:45 UTC (permalink / raw)
To: Ezequiel Garcia
Cc: Grant Likely, linux-mtd@lists.infradead.org, Brian Norris,
Boris BREZILLON
>From: Ezequiel Garcia
>
>Third round, fixing a stupid semi-colon miss.
>
>NAND controllers have special ECC modes, raising per-driver ECC mode devicetree
>binding. See for instance the binding for OMAP:
>
> - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
> "sw" <deprecated> use "ham1" instead
> "hw" <deprecated> use "ham1" instead
> "hw-romcode" <deprecated> use "ham1" instead
> "ham1" 1-bit Hamming ecc code
> "bch4" 4-bit BCH ecc code
> "bch8" 8-bit BCH ecc code
>
>Other drivers (such as pxa3xx-nand) have similar requirements, with special
>(controller-specific) ECC modes. Instead of adding a possibly different
>binding per compatible-string, let's add generic ECC strength and ECC step size.
>
>This properties aim at providing a complete description of the required ECC
>correction to let drivers choose the appropriate ECC mode.
>
>Changes from v2:
>
> * Added a missing semi-colon.
>
>Changes from v1:
>
> * Improve the binding documentation, as per Brian Norris' suggestions.
>
> * Added the helper functions.
>
>Ezequiel Garcia (2):
> of_mtd: Add helpers to get ECC strength and ECC step size
> mtd: nand: Add a devicetree binding for ECC strength and ECC step size
>
> Documentation/devicetree/bindings/mtd/nand.txt | 14 +++++++++++
> drivers/of/of_mtd.c | 34 ++++++++++++++++++++++++++
> include/linux/of_mtd.h | 12 +++++++++
> 3 files changed, 60 insertions(+)
>
>--
>1.8.1.5
>
Thanks Ezequiel. This would help TI's OMAP NAND driver to move from
vendor specific bindings to generic bindings. So for both patches.
Acked-by: Pekon Gupta <pekon@ti.com>
with regards, pekon
^ permalink raw reply [flat|nested] 6+ messages in thread