From: Jaime Liao <jaimeliao.tw@gmail.com>
To: linux-mtd@lists.infradead.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, michael@walle.cc, miquel.raynal@bootlin.com
Cc: leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: [PATCH v5 0/6] Add octal DTR support for Macronix flash
Date: Fri, 17 Nov 2023 16:38:47 +0800 [thread overview]
Message-ID: <20231117083853.33329-1-jaimeliao.tw@gmail.com> (raw)
From: JaimeLiao <jaimeliao@mxic.com.tw>
Add method for Macronix Octal DTR Eable/Disable.
Merge Tudor's patch "Allow specifying the byte order in DTR mode"
Add support for Macronix flash
v5:
Remove manufacturer read id function.
For increased readability, seperate Flash IDs based on whether
it supports RWW feature.
v4:
Add patch for adding manufacturer read id function.
remove patch "hook manufacturer by checking first byte id"
v3:
Add patch for hook manufacturer by comparing ID 1st byte.
Add patches for specifying the byte order in DTR mode by merging
Tudor's patch.
v2:
Following exsting rules to re-create Macronix specify Octal DTR method.
change signature to jaimeliao@mxic.com.tw
Clear sector size information in flash INFO.
JaimeLiao (6):
mtd: spi-nor: add Octal DTR support for Macronix flash
spi: spi-mem: Allow specifying the byte order in DTR mode
mtd: spi-nor: core: Allow specifying the byte order in DTR mode
mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
mtd: spi-nor: add support for Macronix Octal flash with RWW feature
mtd: spi-nor: add support for Macronix Octal flash
drivers/mtd/spi-nor/core.c | 8 ++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/macronix.c | 181 +++++++++++++++++++++++++++++++++
drivers/mtd/spi-nor/sfdp.c | 4 +
drivers/mtd/spi-nor/sfdp.h | 1 +
drivers/spi/spi-mem.c | 4 +
include/linux/spi/spi-mem.h | 6 ++
7 files changed, 205 insertions(+)
--
2.25.1
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next reply other threads:[~2023-11-17 8:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-17 8:38 Jaime Liao [this message]
2023-11-17 8:38 ` [PATCH v5 1/6] mtd: spi-nor: add Octal DTR support for Macronix flash Jaime Liao
2023-11-17 8:38 ` [PATCH v5 2/6] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2023-11-17 9:17 ` Tudor Ambarus
2023-11-17 10:00 ` liao jaime
2023-11-17 8:38 ` [PATCH v5 3/6] mtd: spi-nor: core: " Jaime Liao
2023-11-21 8:40 ` Michael Walle
2023-11-21 9:53 ` liao jaime
2023-11-17 8:38 ` [PATCH v5 4/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2023-11-17 8:38 ` [PATCH v5 5/6] mtd: spi-nor: add support for Macronix Octal flash with RWW feature Jaime Liao
2023-11-17 9:21 ` Tudor Ambarus
2023-11-17 10:01 ` liao jaime
2023-11-17 8:38 ` [PATCH v5 6/6] mtd: spi-nor: add support for Macronix Octal flash Jaime Liao
2023-11-17 8:57 ` Michael Walle
2023-11-17 9:05 ` Tudor Ambarus
[not found] ` <CAAQoYRkw5hUONJ32sGKxgv5XtO24Vc6=KojankTG73u5E7jPBw@mail.gmail.com>
2023-11-21 8:51 ` Michael Walle
2023-11-21 9:09 ` Tudor Ambarus
2023-11-22 3:15 ` liao jaime
2023-11-22 10:16 ` Michael Walle
2023-11-17 9:23 ` Tudor Ambarus
2023-11-17 8:48 ` [PATCH v5 0/6] Add octal DTR support for Macronix flash Michael Walle
2023-11-17 10:09 ` liao jaime
2023-11-17 10:26 ` Michael Walle
2023-11-20 1:50 ` liao jaime
2023-11-21 8:29 ` Michael Walle
2023-11-21 8:32 ` liao jaime
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