From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: tkuw584924@gmail.com, linux-mtd@lists.infradead.org
Cc: pratyush@kernel.org, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, d-gole@ti.com,
Bacem.Daassi@infineon.com,
Takahiro Kuwano <Takahiro.Kuwano@infineon.com>,
stable@vger.kernel.org
Subject: Re: [PATCH 1/5] mtd: spi-nor: spansion: Preserve CFR2V[7] when writing MEMLAT
Date: Mon, 12 Jun 2023 11:51:55 +0100 [thread overview]
Message-ID: <2a33ff36-d8f6-bd23-b7e3-4c1f1c00330a@linaro.org> (raw)
In-Reply-To: <15d87d29e53945739e7c2b3f58e2f623e2a77f08.1686557139.git.Takahiro.Kuwano@infineon.com>
On 6/12/23 11:04, tkuw584924@gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>
> CFR2V[7] is assigned to Flash's address mode (3- or 4-ybte) and must not
> be changed when writing MEMLAT (CFR2V[3:0]). CFR2V must be read first,
> modified only CFR2V[3:0], then written back.
Last sentence could be reworded to "CFR2V shall be used in a read,
update, write back fashion."
Please specify in the commit message if this fixes a present bug or it's
just a prerequisite for the support that comes. The change is good but
we should be aware if you hit bugs or not.
>
> Fixes: c3266af101f2 ("mtd: spi-nor: spansion: add support for Cypress Semper flash")
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
> Cc: stable@vger.kernel.org
> ---
> drivers/mtd/spi-nor/spansion.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index f2f4bc060f5e..7804be3a9f2a 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -27,6 +27,7 @@
> #define SPINOR_REG_CYPRESS_CFR2 0x3
> #define SPINOR_REG_CYPRESS_CFR2V \
> (SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_CFR2)
> +#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK GENMASK(3, 0)
> #define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
> #define SPINOR_REG_CYPRESS_CFR2_ADRBYT BIT(7)
> #define SPINOR_REG_CYPRESS_CFR3 0x4
> @@ -162,8 +163,17 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
> int ret;
> u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
>
> + op = (struct spi_mem_op)
> + CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes,
> + SPINOR_REG_CYPRESS_CFR2V, 0, buf);
> +
> + ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
> + if (ret)
> + return ret;
> +
> /* Use 24 dummy cycles for memory array reads. */
> - *buf = SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
> + *buf &= ~SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK;
> + *buf |= SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
Use FIELD_PREP please.
> op = (struct spi_mem_op)
> CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
> SPINOR_REG_CYPRESS_CFR2V, 1, buf);
Shall you zeroize the struct before using it again?
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next prev parent reply other threads:[~2023-06-12 10:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-12 10:04 [PATCH 0/5] mtd: spi-nor: spansion: Add support for Infineon S28HS02GT tkuw584924
2023-06-12 10:04 ` [PATCH 1/5] mtd: spi-nor: spansion: Preserve CFR2V[7] when writing MEMLAT tkuw584924
2023-06-12 10:51 ` Tudor Ambarus [this message]
2023-06-12 10:04 ` [PATCH 2/5] mtd: spi-nor: spansion: Rework octal_dtr_enable() tkuw584924
2023-06-12 12:05 ` Tudor Ambarus
2023-06-12 10:04 ` [PATCH 3/5] mtd: spi-nor: spansion: Add MCP support in octal_dtr_enable() tkuw584924
2023-06-12 12:13 ` Tudor Ambarus
2023-07-17 22:49 ` Michael Walle
2023-07-18 7:06 ` Takahiro Kuwano
2023-07-18 7:30 ` Michael Walle
2023-06-12 10:04 ` [PATCH 4/5] mtd: spi-nor: spansion: Octal DTR support in RD_ANY_REG_OP tkuw584924
2023-06-12 12:18 ` Tudor Ambarus
2023-06-12 10:04 ` [PATCH 5/5] mtd: spi-nor: spansion: Add S28HS02GT ID and fixups tkuw584924
2023-06-12 12:23 ` Tudor Ambarus
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