[PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512

[PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512

[Matthew Parker]

Add support for the GigaDevice GD25B512 512Mbit (64 MiB) SPI NOR flash.

The chip exposes valid JESD216B SFDP tables including 4-byte address
instruction tables, from which geometry and opcodes are discovered.
Stateless 4-byte opcodes and status register locking are enabled. Read,
write, and erase functionality across the full memory array have been
tested on hardware.

Cc: stable@vger.kernel.org # v6.1+
Co-developed-by: Adam Calabrigo <adamc@arista.com>
Signed-off-by: Adam Calabrigo <adamc@arista.com>
Signed-off-by: Matthew Parker <mparker@arista.com>
---
 drivers/mtd/spi-nor/gigadevice.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index 6a2e6ebda148..de96cefde516 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -64,6 +64,10 @@ static const struct flash_info gigadevice_nor_parts[] = {
 		.id = SNOR_ID(0xc8, 0x40, 0x19),
 		.name = "gd25q256",
 		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
+	}, {
+		.id = SNOR_ID(0xc8, 0x47, 0x1a),
+		.flags = SPI_NOR_HAS_LOCK,
+		.fixup_flags = SPI_NOR_4B_OPCODES,
 	}, {
 		.id = SNOR_ID(0xc8, 0x60, 0x16),
 		.name = "gd25lq32",
-- 
2.51.0


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Re: [PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] mtd: spi-nor: gigadevice: invalid .fixup_flags initializer in
  flash_info
--

commit ff73c2eea3b59a78f4c9acc05bbd14cc3fb22bf2
Author: Matthew Parker <mparker@arista.com>

mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512

This commit adds a flash_info entry for the GigaDevice GD25B512 64 MiB SPI
NOR flash to gigadevice_nor_parts[].

> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> index 6a2e6ebda1483..de96cefde516b 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -64,6 +64,10 @@ static const struct flash_info gigadevice_nor_parts[] = {
>  		.id = SNOR_ID(0xc8, 0x40, 0x19),
>  		.name = "gd25q256",
>  		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
> +	}, {
> +		.id = SNOR_ID(0xc8, 0x47, 0x1a),
> +		.flags = SPI_NOR_HAS_LOCK,
> +		.fixup_flags = SPI_NOR_4B_OPCODES,

[Severity: High]
Does this break the build when CONFIG_MTD_SPI_NOR is enabled?  struct
flash_info has no .fixup_flags member (fixup_flags lives in struct
spi_nor_fixup).  Since the chip exposes an SFDP 4-byte Address Instruction
Table, spi_nor_parse_4bait() already sets SNOR_F_4B_OPCODES, so the
.fixup_flags initializer can be dropped.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261108022011.898185-1-mparker@arista.com?part=1

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Re: [PATCH] mtd: spi-nor: gigadevice: Add support for GigaDevice GD25B512

[Michael Walle]

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Hi Matthew,

On Sun Nov 8, 2026 at 3:20 AM CET, Matthew Parker wrote:
> Add support for the GigaDevice GD25B512 512Mbit (64 MiB) SPI NOR flash.
>
> The chip exposes valid JESD216B SFDP tables including 4-byte address
> instruction tables, from which geometry and opcodes are discovered.
> Stateless 4-byte opcodes and status register locking are enabled. Read,
> write, and erase functionality across the full memory array have been
> tested on hardware.
>
> Cc: stable@vger.kernel.org # v6.1+
> Co-developed-by: Adam Calabrigo <adamc@arista.com>

Co-developed-by for just adding an id?

Please note that we have some requirements for new flashes, see [1].
Same for the your other patch.

-michael

[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html

> Signed-off-by: Adam Calabrigo <adamc@arista.com>
> Signed-off-by: Matthew Parker <mparker@arista.com>
> ---
>  drivers/mtd/spi-nor/gigadevice.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> index 6a2e6ebda148..de96cefde516 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -64,6 +64,10 @@ static const struct flash_info gigadevice_nor_parts[] = {
>  		.id = SNOR_ID(0xc8, 0x40, 0x19),
>  		.name = "gd25q256",
>  		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
> +	}, {
> +		.id = SNOR_ID(0xc8, 0x47, 0x1a),
> +		.flags = SPI_NOR_HAS_LOCK,
> +		.fixup_flags = SPI_NOR_4B_OPCODES,
>  	}, {
>  		.id = SNOR_ID(0xc8, 0x60, 0x16),
>  		.name = "gd25lq32",


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