From: Ivan Mikhaylov <i.mikhaylov@yadro.com>
To: Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH 2/2] mtd: spi-nor: enable lock interface for macronix chips
Date: Wed, 30 Sep 2020 16:09:32 +0300 [thread overview]
Message-ID: <f6d82a7a3411aed1f72f1ff3bb5f84426c44bda1.camel@yadro.com> (raw)
In-Reply-To: <cb47d79f-ecbb-f0ec-388e-b56ba740045e@ti.com>
On Wed, 2020-09-30 at 15:10 +0530, Vignesh Raghavendra wrote:
> Hi,
>
> On 9/21/20 4:54 PM, Ivan Mikhaylov wrote:
> > Add locks for whole macronix chip series with BP0-2 and BP0-3 bits.
> >
> > Tested with mx25l51245g(BP0-3).
>
> Since you have only tested on flash that have 4bit BP, please don't
> modify flashes that have 3bit BP. Lets be conservative and enable only
> things that have been tested else we may end up with broken feature from
> day 1.
>
Sure, will do then this way.
Thanks.
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prev parent reply other threads:[~2020-09-30 13:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-21 11:24 [RESEND PATCH 0/2] enable lock interface for macronix chips Ivan Mikhaylov
2020-09-21 11:24 ` [RESEND PATCH 1/2] mtd: spi-nor: do not touch TB bit without SPI_NOR_HAS_TB Ivan Mikhaylov
2020-09-30 9:36 ` Vignesh Raghavendra
2020-09-30 13:07 ` Ivan Mikhaylov
2020-09-30 14:00 ` Vignesh Raghavendra
2020-09-30 16:22 ` Ivan Mikhaylov
2020-09-21 11:24 ` [RESEND PATCH 2/2] mtd: spi-nor: enable lock interface for macronix chips Ivan Mikhaylov
2020-09-30 9:40 ` Vignesh Raghavendra
2020-09-30 13:09 ` Ivan Mikhaylov [this message]
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