* RDY bit clarification
@ 2018-01-14 3:56 muthu crazy
2018-01-15 1:57 ` Keith Busch
0 siblings, 1 reply; 4+ messages in thread
From: muthu crazy @ 2018-01-14 3:56 UTC (permalink / raw)
Why does linux nvme target code is checking for NVME_CSTS_RDY == 1
before submitting any IO commands to device. Is there any chance RDY
can go down after the controller initialization. It make sense if we
check for CFS instead of RDY.
Isn't causing performance drop?
Thanks in advance,
Muthu
^ permalink raw reply [flat|nested] 4+ messages in thread
* RDY bit clarification
2018-01-14 3:56 RDY bit clarification muthu crazy
@ 2018-01-15 1:57 ` Keith Busch
2018-01-15 2:06 ` muthu crazy
0 siblings, 1 reply; 4+ messages in thread
From: Keith Busch @ 2018-01-15 1:57 UTC (permalink / raw)
On Sun, Jan 14, 2018@09:26:23AM +0530, muthu crazy wrote:
> Why does linux nvme target code is checking for NVME_CSTS_RDY == 1
> before submitting any IO commands to device. Is there any chance RDY
> can go down after the controller initialization. It make sense if we
> check for CFS instead of RDY.
>
> Isn't causing performance drop?
I don't think it's for situations where RDY goest down on it's own, but
for checking if a badly behaving host sends a command before respecting
the proper state transitions.
^ permalink raw reply [flat|nested] 4+ messages in thread
* RDY bit clarification
2018-01-15 1:57 ` Keith Busch
@ 2018-01-15 2:06 ` muthu crazy
2018-01-15 2:12 ` Keith Busch
0 siblings, 1 reply; 4+ messages in thread
From: muthu crazy @ 2018-01-15 2:06 UTC (permalink / raw)
My concern is Reading RDY bit will trigger a MemRD PCIe transcation
which will add a delay for every command.
So it will affect the overall performance.
On 15 January 2018@07:27, Keith Busch <keith.busch@intel.com> wrote:
> On Sun, Jan 14, 2018@09:26:23AM +0530, muthu crazy wrote:
>> Why does linux nvme target code is checking for NVME_CSTS_RDY == 1
>> before submitting any IO commands to device. Is there any chance RDY
>> can go down after the controller initialization. It make sense if we
>> check for CFS instead of RDY.
>>
>> Isn't causing performance drop?
>
> I don't think it's for situations where RDY goest down on it's own, but
> for checking if a badly behaving host sends a command before respecting
> the proper state transitions.
^ permalink raw reply [flat|nested] 4+ messages in thread
* RDY bit clarification
2018-01-15 2:06 ` muthu crazy
@ 2018-01-15 2:12 ` Keith Busch
0 siblings, 0 replies; 4+ messages in thread
From: Keith Busch @ 2018-01-15 2:12 UTC (permalink / raw)
On Mon, Jan 15, 2018@07:36:27AM +0530, muthu crazy wrote:
> My concern is Reading RDY bit will trigger a MemRD PCIe transcation
> which will add a delay for every command.
> So it will affect the overall performance.
Maybe I misunderstood what you're referring to. Are you looking at
nvmet_check_ctrl_status? The controller status is implemented in
software there and doesn't do MMIO to read it.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-01-15 2:12 UTC | newest]
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2018-01-14 3:56 RDY bit clarification muthu crazy
2018-01-15 1:57 ` Keith Busch
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