Re: [PATCH 1/9] ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures

[Kevin Hilman <khilman@linaro.org>]

Santosh Shilimkar <santosh.shilimkar@ti.com> writes:

> From: Tero Kristo <t-kristo@ti.com>
>
> Simplifies code and also allows the re-use as is on OMAP5 devices.

nit: changelog here is rather weak.  It claims "simplifies code" but
it's not obvious from the patch how changing a few #defines does that.

Kevin

> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
>  arch/arm/mach-omap2/omap4-sar-layout.h |   14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
> index e170fe8..6822d0a 100644
> --- a/arch/arm/mach-omap2/omap4-sar-layout.h
> +++ b/arch/arm/mach-omap2/omap4-sar-layout.h
> @@ -20,13 +20,13 @@
>  #define SAR_BANK4_OFFSET		0x3000
>  
>  /* Scratch pad memory offsets from SAR_BANK1 */
> -#define SCU_OFFSET0				0xd00
> -#define SCU_OFFSET1				0xd04
> -#define OMAP_TYPE_OFFSET			0xd10
> -#define L2X0_SAVE_OFFSET0			0xd14
> -#define L2X0_SAVE_OFFSET1			0xd18
> -#define L2X0_AUXCTRL_OFFSET			0xd1c
> -#define L2X0_PREFETCH_CTRL_OFFSET		0xd20
> +#define SCU_OFFSET0				0xfe4
> +#define SCU_OFFSET1				0xfe8
> +#define OMAP_TYPE_OFFSET			0xfec
> +#define L2X0_SAVE_OFFSET0			0xff0
> +#define L2X0_SAVE_OFFSET1			0xff4
> +#define L2X0_AUXCTRL_OFFSET			0xff8
> +#define L2X0_PREFETCH_CTRL_OFFSET		0xffc
>  
>  /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
>  #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET		0xa04