From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
Johan Hovold <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: [PATCH v3 2/9] phy: qcom-qmp-pcie: drop if (table) conditions
Date: Fri, 9 Sep 2022 12:14:26 +0300 [thread overview]
Message-ID: <20220909091433.3715981-3-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220909091433.3715981-1-dmitry.baryshkov@linaro.org>
Drop unused if (table) conditions, since the function
qcom_qmp_phy_pcie_configure_lane() has this check anyway.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 3ddbb8e89f04..536a6ac835c1 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -1930,8 +1930,7 @@ static int qcom_qmp_phy_pcie_serdes_init(struct qmp_phy *qphy)
int serdes_tbl_num = cfg->serdes_tbl_num;
qcom_qmp_phy_pcie_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
- if (cfg->serdes_tbl_sec)
- qcom_qmp_phy_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec,
+ qcom_qmp_phy_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec,
cfg->serdes_tbl_num_sec);
return 0;
@@ -2037,44 +2036,38 @@ static int qcom_qmp_phy_pcie_power_on(struct phy *phy)
/* Tx, Rx, and PCS configurations */
qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs,
cfg->tx_tbl, cfg->tx_tbl_num, 1);
- if (cfg->tx_tbl_sec)
- qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec,
+ qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec,
cfg->tx_tbl_num_sec, 1);
/* Configuration for other LANE for USB-DP combo PHY */
if (cfg->is_dual_lane_phy) {
qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs,
cfg->tx_tbl, cfg->tx_tbl_num, 2);
- if (cfg->tx_tbl_sec)
- qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs,
+ qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs,
cfg->tx_tbl_sec,
cfg->tx_tbl_num_sec, 2);
}
qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs,
cfg->rx_tbl, cfg->rx_tbl_num, 1);
- if (cfg->rx_tbl_sec)
- qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs,
+ qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs,
cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 1);
if (cfg->is_dual_lane_phy) {
qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs,
cfg->rx_tbl, cfg->rx_tbl_num, 2);
- if (cfg->rx_tbl_sec)
- qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs,
+ qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs,
cfg->rx_tbl_sec,
cfg->rx_tbl_num_sec, 2);
}
qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
- if (cfg->pcs_tbl_sec)
- qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec,
+ qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec,
cfg->pcs_tbl_num_sec);
qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl,
cfg->pcs_misc_tbl_num);
- if (cfg->pcs_misc_tbl_sec)
- qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec,
+ qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec,
cfg->pcs_misc_tbl_num_sec);
/*
--
2.35.1
next prev parent reply other threads:[~2022-09-09 9:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-09 9:14 [PATCH v3 0/9] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 1/9] phy: define submodes for PCIe PHYs Dmitry Baryshkov
2022-09-24 6:18 ` Vinod Koul
2022-09-09 9:14 ` Dmitry Baryshkov [this message]
2022-09-09 9:14 ` [PATCH v3 3/9] phy: qcom-qmp-pcie: split register tables into main and secondary parts Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 4/9] phy: qcom-qmp-pcie: split PHY programming to separate functions Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 5/9] phy: qcom-qmp-pcie: turn secondary programming table into a pointer Dmitry Baryshkov
2022-09-14 6:59 ` Johan Hovold
2022-09-09 9:14 ` [PATCH v3 6/9] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 7/9] phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in " Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 8/9] PCI: qcom: Setup PHY to work in RC mode Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 9/9] PCI: qcom-ep: Setup PHY to work in EP mode Dmitry Baryshkov
2022-09-14 6:48 ` [PATCH v3 0/9] PCI: qcom: Support using the same PHY for both RC and EP Johan Hovold
2022-09-24 5:48 ` Vinod Koul
2022-09-26 7:09 ` Johan Hovold
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