From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@ti.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
Johan Hovold <johan@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: [PATCH v3 8/9] PCI: qcom: Setup PHY to work in RC mode
Date: Fri, 9 Sep 2022 12:14:32 +0300 [thread overview]
Message-ID: <20220909091433.3715981-9-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220909091433.3715981-1-dmitry.baryshkov@linaro.org>
Call phy_set_mode_ext() to notify the PHY driver that the PHY is being
used in the RC mode.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/pci/controller/dwc/pcie-qcom.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 66886dc6e777..32d58282bed0 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1494,6 +1494,10 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
if (ret)
return ret;
+ ret = phy_set_mode_ext(pcie->phy, PHY_MODE_PCIE, PHY_SUBMODE_PCIE_RC);
+ if (ret)
+ goto err_deinit;
+
ret = phy_power_on(pcie->phy);
if (ret)
goto err_deinit;
--
2.35.1
next prev parent reply other threads:[~2022-09-09 9:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-09 9:14 [PATCH v3 0/9] PCI: qcom: Support using the same PHY for both RC and EP Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 1/9] phy: define submodes for PCIe PHYs Dmitry Baryshkov
2022-09-24 6:18 ` Vinod Koul
2022-09-09 9:14 ` [PATCH v3 2/9] phy: qcom-qmp-pcie: drop if (table) conditions Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 3/9] phy: qcom-qmp-pcie: split register tables into main and secondary parts Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 4/9] phy: qcom-qmp-pcie: split PHY programming to separate functions Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 5/9] phy: qcom-qmp-pcie: turn secondary programming table into a pointer Dmitry Baryshkov
2022-09-14 6:59 ` Johan Hovold
2022-09-09 9:14 ` [PATCH v3 6/9] phy: qcom-qmp-pcie: support separate tables for EP mode Dmitry Baryshkov
2022-09-09 9:14 ` [PATCH v3 7/9] phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in " Dmitry Baryshkov
2022-09-09 9:14 ` Dmitry Baryshkov [this message]
2022-09-09 9:14 ` [PATCH v3 9/9] PCI: qcom-ep: Setup PHY to work " Dmitry Baryshkov
2022-09-14 6:48 ` [PATCH v3 0/9] PCI: qcom: Support using the same PHY for both RC and EP Johan Hovold
2022-09-24 5:48 ` Vinod Koul
2022-09-26 7:09 ` Johan Hovold
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