Linux PCI subsystem development
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From: Frank Li <Frank.Li@nxp.com>
To: "Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Anup Patel" <apatel@ventanamicro.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Marc Zyngier" <maz@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Arnd Bergmann" <arnd@arndb.de>, "Shuah Khan" <shuah@kernel.org>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: Niklas Cassel <cassel@kernel.org>,
	dlemoal@kernel.org, jdmason@kudzu.us,
	 linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,  linux-pci@vger.kernel.org,
	linux-kselftest@vger.kernel.org,  imx@lists.linux.dev,
	devicetree@vger.kernel.org,  Frank Li <Frank.Li@nxp.com>
Subject: [PATCH v14 04/15] irqchip/gic-v3-its: Add support for device tree msi-map and msi-mask
Date: Fri, 07 Feb 2025 14:39:46 -0500	[thread overview]
Message-ID: <20250207-ep-msi-v14-4-9671b136f2b8@nxp.com> (raw)
In-Reply-To: <20250207-ep-msi-v14-0-9671b136f2b8@nxp.com>

Some platform devices create child devices dynamically and require the
parent device's msi-map to map device IDs to actual sideband information.

A typical use case is using ITS as a PCIe Endpoint Controller(EPC)'s
doorbell function, where PCI hosts send TLP memory writes to the EP
controller. The EP controller converts these writes to AXI transactions
and appends platform-specific sideband information.  See below figure.

               ┌────────────────────────────────┐
               │                                │
               │     PCI Endpoint Controller    │
               │                                │
               │  ┌─────┐   ┌─────┐     ┌─────┐ │
    PCI Bus    │  │     │   │     │     │     │ │
    ─────────► │  │Func1│   │Func2│ ... │Func │ │
    TLP Memory │  │     │   │     │     │<n>  │ │
    Write Push │  │     │   │     │     │     │ │
    DoorBell   │  └─┬─┬─┘   └──┬──┘     └──┬──┘ │
               │    │ │        │           │    │
               └────┼─┼────────┼───────────┼────┘
        sideband    │ │ Address│           │
        information ▼ ▼ /Data  ▼           ▼
                   ┌────────────────────────┐
                   │    MSI Controller      │
                   └────────────────────────┘

EPC's DTS will provide such information by msi-map and msi-mask. A
simplified dts as

pcie-ep@10000000 {
	...
	msi-map = <0 &its 0xc 8>;
                          ^^^ 0xc is implement defined sideband information,
			      which append to AXI write transaction.
	           ^ 0 is function index.

	msi-mask = <0x7>
}

Check msi-map if msi-parent missed to keep compatility with existed system.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/irqchip/irq-gic-v3-its-msi-parent.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
index e150365fbe892..6c7389bb84a4a 100644
--- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c
+++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c
@@ -118,6 +118,14 @@ static int of_pmsi_get_dev_id(struct irq_domain *domain, struct device *dev,
 		index++;
 	} while (!ret);
 
+	if (ret) {
+		struct device_node *np = NULL;
+
+		ret = of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &np, dev_id);
+		if (np)
+			of_node_put(np);
+	}
+
 	return ret;
 }
 

-- 
2.34.1


  parent reply	other threads:[~2025-02-07 19:40 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-07 19:39 [PATCH v14 00/15] PCI: EP: Add RC-to-EP doorbell with platform MSI controller Frank Li
2025-02-07 19:39 ` [PATCH v14 01/15] platform-msi: Add msi_remove_device_irq_domain() in platform_device_msi_free_irqs_all() Frank Li
2025-02-07 19:39 ` [PATCH v14 02/15] irqdomain: Add IRQ_DOMAIN_FLAG_MSI_IMMUTABLE and irq_domain_is_msi_immutable() Frank Li
2025-02-07 19:39 ` [PATCH v14 03/15] irqchip/gic-v3-its: Set IRQ_DOMAIN_FLAG_MSI_IMMUTABLE for ITS Frank Li
2025-02-07 19:39 ` Frank Li [this message]
2025-02-07 19:39 ` [PATCH v14 05/15] PCI: endpoint: Set ID and of_node for function driver Frank Li
2025-02-07 19:39 ` [PATCH v14 06/15] PCI: endpoint: Add RC-to-EP doorbell support using platform MSI controller Frank Li
2025-02-08 14:17   ` kernel test robot
2025-02-07 19:39 ` [PATCH v14 07/15] PCI: endpoint: pci-ep-msi: Add MSI address/data pair mutable check Frank Li
2025-02-08 15:00   ` kernel test robot
2025-02-07 19:39 ` [PATCH v14 08/15] PCI: endpoint: Add pci_epf_align_inbound_addr() helper for address alignment Frank Li
2025-02-07 19:39 ` [PATCH v14 09/15] PCI: endpoint: pci-epf-test: Add doorbell test support Frank Li
2025-02-08 15:43   ` kernel test robot
2025-02-07 19:39 ` [PATCH v14 10/15] misc: pci_endpoint_test: Add doorbell test case Frank Li
2025-02-07 19:39 ` [PATCH v14 11/15] selftests: pci_endpoint: " Frank Li
2025-02-07 19:39 ` [PATCH v14 12/15] pci: imx6: Add helper function imx_pcie_add_lut_by_rid() Frank Li
2025-02-07 19:39 ` [PATCH v14 13/15] pci: imx6: Add LUT setting for MSI/IOMMU in Endpoint mode Frank Li
2025-02-07 19:39 ` [PATCH v14 14/15] arm64: dts: imx95: Add msi-map for pci-ep device Frank Li
2025-02-07 19:39 ` [PATCH v14 15/15] arm64: dts: imx95-19x19-evk: Add PCIe1 endpoint function overlay file Frank Li

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