* [PATCH V2] PCI: Add ACS quirk for Loongson PCIe
@ 2025-04-03 4:07 Huacai Chen
2025-04-14 13:50 ` Huacai Chen
2025-04-17 20:28 ` Bjorn Helgaas
0 siblings, 2 replies; 3+ messages in thread
From: Huacai Chen @ 2025-04-03 4:07 UTC (permalink / raw)
To: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring
Cc: linux-pci, Jianmin Lv, Xuefeng Li, Huacai Chen, Jiaxun Yang,
Huacai Chen, stable, Xianglai Li
Loongson PCIe Root Ports don't advertise an ACS capability, but they do
not allow peer-to-peer transactions between Root Ports. Add an ACS quirk
so each Root Port can be in a separate IOMMU group.
Cc: stable@vger.kernel.org
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
V2: Add more device ids.
drivers/pci/quirks.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 8d610c17e0f2..eee96ad03614 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4995,6 +4995,18 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
}
+static int pci_quirk_loongson_acs(struct pci_dev *dev, u16 acs_flags)
+{
+ /*
+ * Loongson PCIe Root Ports don't advertise an ACS capability, but
+ * they do not allow peer-to-peer transactions between Root Ports.
+ * Allow each Root Port to be in a separate IOMMU group by masking
+ * SV/RR/CR/UF bits.
+ */
+ return pci_acs_ctrl_enabled(acs_flags,
+ PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+}
+
/*
* Wangxun 40G/25G/10G/1G NICs have no ACS capability, but on
* multi-function devices, the hardware isolates the functions by
@@ -5128,6 +5140,17 @@ static const struct pci_dev_acs_enabled {
{ PCI_VENDOR_ID_BROADCOM, 0x1762, pci_quirk_mf_endpoint_acs },
{ PCI_VENDOR_ID_BROADCOM, 0x1763, pci_quirk_mf_endpoint_acs },
{ PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
+ /* Loongson PCIe Root Ports */
+ { PCI_VENDOR_ID_LOONGSON, 0x3C09, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x3C19, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x3C29, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A09, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A19, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A29, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A39, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A49, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A59, pci_quirk_loongson_acs },
+ { PCI_VENDOR_ID_LOONGSON, 0x7A69, pci_quirk_loongson_acs },
/* Amazon Annapurna Labs */
{ PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
/* Zhaoxin multi-function devices */
--
2.47.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH V2] PCI: Add ACS quirk for Loongson PCIe
2025-04-03 4:07 [PATCH V2] PCI: Add ACS quirk for Loongson PCIe Huacai Chen
@ 2025-04-14 13:50 ` Huacai Chen
2025-04-17 20:28 ` Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Huacai Chen @ 2025-04-14 13:50 UTC (permalink / raw)
To: Huacai Chen
Cc: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, linux-pci, Jianmin Lv, Xuefeng Li, Jiaxun Yang,
stable, Xianglai Li
Gentle ping?
Huacai
On Thu, Apr 3, 2025 at 12:08 PM Huacai Chen <chenhuacai@loongson.cn> wrote:
>
> Loongson PCIe Root Ports don't advertise an ACS capability, but they do
> not allow peer-to-peer transactions between Root Ports. Add an ACS quirk
> so each Root Port can be in a separate IOMMU group.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
> V2: Add more device ids.
>
> drivers/pci/quirks.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 8d610c17e0f2..eee96ad03614 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4995,6 +4995,18 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
> PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
> }
>
> +static int pci_quirk_loongson_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> + /*
> + * Loongson PCIe Root Ports don't advertise an ACS capability, but
> + * they do not allow peer-to-peer transactions between Root Ports.
> + * Allow each Root Port to be in a separate IOMMU group by masking
> + * SV/RR/CR/UF bits.
> + */
> + return pci_acs_ctrl_enabled(acs_flags,
> + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
> +}
> +
> /*
> * Wangxun 40G/25G/10G/1G NICs have no ACS capability, but on
> * multi-function devices, the hardware isolates the functions by
> @@ -5128,6 +5140,17 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_BROADCOM, 0x1762, pci_quirk_mf_endpoint_acs },
> { PCI_VENDOR_ID_BROADCOM, 0x1763, pci_quirk_mf_endpoint_acs },
> { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
> + /* Loongson PCIe Root Ports */
> + { PCI_VENDOR_ID_LOONGSON, 0x3C09, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x3C19, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x3C29, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A09, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A19, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A29, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A39, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A49, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A59, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A69, pci_quirk_loongson_acs },
> /* Amazon Annapurna Labs */
> { PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
> /* Zhaoxin multi-function devices */
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V2] PCI: Add ACS quirk for Loongson PCIe
2025-04-03 4:07 [PATCH V2] PCI: Add ACS quirk for Loongson PCIe Huacai Chen
2025-04-14 13:50 ` Huacai Chen
@ 2025-04-17 20:28 ` Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Helgaas @ 2025-04-17 20:28 UTC (permalink / raw)
To: Huacai Chen
Cc: Bjorn Helgaas, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, linux-pci, Jianmin Lv, Xuefeng Li, Huacai Chen,
Jiaxun Yang, stable, Xianglai Li
On Thu, Apr 03, 2025 at 12:07:56PM +0800, Huacai Chen wrote:
> Loongson PCIe Root Ports don't advertise an ACS capability, but they do
> not allow peer-to-peer transactions between Root Ports. Add an ACS quirk
> so each Root Port can be in a separate IOMMU group.
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Applied to pci/virtualization for v6.16, thanks!
> ---
> V2: Add more device ids.
>
> drivers/pci/quirks.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 8d610c17e0f2..eee96ad03614 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4995,6 +4995,18 @@ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
> PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
> }
>
> +static int pci_quirk_loongson_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> + /*
> + * Loongson PCIe Root Ports don't advertise an ACS capability, but
> + * they do not allow peer-to-peer transactions between Root Ports.
> + * Allow each Root Port to be in a separate IOMMU group by masking
> + * SV/RR/CR/UF bits.
> + */
> + return pci_acs_ctrl_enabled(acs_flags,
> + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
> +}
> +
> /*
> * Wangxun 40G/25G/10G/1G NICs have no ACS capability, but on
> * multi-function devices, the hardware isolates the functions by
> @@ -5128,6 +5140,17 @@ static const struct pci_dev_acs_enabled {
> { PCI_VENDOR_ID_BROADCOM, 0x1762, pci_quirk_mf_endpoint_acs },
> { PCI_VENDOR_ID_BROADCOM, 0x1763, pci_quirk_mf_endpoint_acs },
> { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
> + /* Loongson PCIe Root Ports */
> + { PCI_VENDOR_ID_LOONGSON, 0x3C09, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x3C19, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x3C29, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A09, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A19, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A29, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A39, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A49, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A59, pci_quirk_loongson_acs },
> + { PCI_VENDOR_ID_LOONGSON, 0x7A69, pci_quirk_loongson_acs },
> /* Amazon Annapurna Labs */
> { PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, pci_quirk_al_acs },
> /* Zhaoxin multi-function devices */
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-04-03 4:07 [PATCH V2] PCI: Add ACS quirk for Loongson PCIe Huacai Chen
2025-04-14 13:50 ` Huacai Chen
2025-04-17 20:28 ` Bjorn Helgaas
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