From: Bjorn Helgaas <helgaas@kernel.org>
To: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2] PCI: Add ASPM quirk for Hi1105 PCIe Wi-Fi
Date: Thu, 13 Nov 2025 06:19:18 -0600 [thread overview]
Message-ID: <20251113121918.GA2274369@bhelgaas> (raw)
In-Reply-To: <5d45ecfb-e566-4166-9bdd-4dcbd036e659@rock-chips.com>
On Thu, Nov 13, 2025 at 09:47:30AM +0800, Shawn Lin wrote:
> 在 2025/11/13 星期四 8:59, Bjorn Helgaas 写道:
> > On Wed, Nov 12, 2025 at 10:58:39AM +0800, Shawn Lin wrote:
> > > This Wi-Fi advertises the L0s and L1 capabilities but actually
> > > it doesn't support them. This's comfirmed by Hisilicon team in
> > > actual productization.
> > >
> > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> >
> > Applied to pci/for-linus, planning for v6.18.
>
> Thanks Bjorn. By checking the for-linus branch, I found an error.
>
> This patch is based on linux-next, but if it's for v6.18, I think we
> need to use quirk_disable_aspm_l0s_l1 instead of
> quirk_disable_aspm_l0s_l1_cap.
Sigh, yep, sorry about that. Fixed.
prev parent reply other threads:[~2025-11-13 12:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-12 2:58 [PATCH v2] PCI: Add ASPM quirk for Hi1105 PCIe Wi-Fi Shawn Lin
2025-11-13 0:59 ` Bjorn Helgaas
2025-11-13 1:47 ` Shawn Lin
2025-11-13 12:19 ` Bjorn Helgaas [this message]
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