Re: [PATCH v2] PCI: Add ASPM quirk for Hi1105 PCIe Wi-Fi

[Shawn Lin <shawn.lin@rock-chips.com>]

在 2025/11/13 星期四 8:59, Bjorn Helgaas 写道:
> On Wed, Nov 12, 2025 at 10:58:39AM +0800, Shawn Lin wrote:
>> This Wi-Fi advertises the L0s and L1 capabilities but actually
>> it doesn't support them. This's comfirmed by Hisilicon team in
>> actual productization.
>>
>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
> 
> Applied to pci/for-linus, planning for v6.18.


Thanks Bjorn. By checking the for-linus branch, I found an error.

This patch is based on linux-next, but if it's for v6.18, I think we
need to use quirk_disable_aspm_l0s_l1 instead of 
quirk_disable_aspm_l0s_l1_cap.

> 
>> ---
>>
>> Changes in v2:
>> - rebase on linux-next
>> - use DECLARE_PCI_FIXUP_HEADER(Bjorn)
>>
>>   drivers/pci/quirks.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index 44e7807..24c2788 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -2536,6 +2536,7 @@ static void quirk_disable_aspm_l0s_l1_cap(struct pci_dev *dev)
>>   	pci_info(dev, "ASPM: L0s L1 removed from Link Capabilities to work around device defect\n");
>>   }
>>   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, 0x0451, quirk_disable_aspm_l0s_l1_cap);
>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, 0x1105, quirk_disable_aspm_l0s_l1_cap);
>>   
>>   /*
>>    * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain
>> -- 
>> 2.7.4
>>
>