* [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements
@ 2026-01-22 7:45 Qiang Yu
2026-01-22 7:45 ` [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability() Qiang Yu
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Qiang Yu @ 2026-01-22 7:45 UTC (permalink / raw)
To: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas
Cc: linux-pci, linux-kernel, linux-arm-msm, Qiang Yu
This series contains two cleanup patches for the PCI DWC subsystem that
improve code readability and maintainability without any functional
changes.
The first patch addresses a naming issue where the "has_msi_ctrl" flag
name was misleading. The flag specifically indicates when a platform uses
the iMSI-RX module for MSI handling, rather than having any generic MSI
controller. Renaming it to "uses_imsi_rx" makes the code's intent much
clearer.
The second patch fixes a grammatical error and improves code formatting.
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
---
Qiang Yu (2):
PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability()
PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++--------
drivers/pci/controller/dwc/pcie-designware.c | 3 ++-
drivers/pci/controller/dwc/pcie-designware.h | 2 +-
drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
4 files changed, 13 insertions(+), 12 deletions(-)
---
base-commit: 86291f774fe8524178446cb2c792939640b4970c
change-id: 20260121-remove_cap_clean_up-970b60cf595a
Best regards,
--
Qiang Yu <qiang.yu@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability()
2026-01-22 7:45 [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Qiang Yu
@ 2026-01-22 7:45 ` Qiang Yu
2026-01-22 8:10 ` Shawn Lin
2026-01-22 7:45 ` [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity Qiang Yu
2026-01-23 7:33 ` [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Manivannan Sadhasivam
2 siblings, 1 reply; 8+ messages in thread
From: Qiang Yu @ 2026-01-22 7:45 UTC (permalink / raw)
To: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas
Cc: linux-pci, linux-kernel, linux-arm-msm, Qiang Yu
Fix a grammatical error in the comment by changing "it's" to "its". Also
add a blank line after the variable declaration for better code
formatting.
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 2fa9f6ee149ed76ee84e8129a47f4bde2fa4d513..18331d9e85be30462277532afa71b5850438f32e 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -268,9 +268,10 @@ void dw_pcie_remove_ext_capability(struct dw_pcie *pci, u8 cap)
return;
header = dw_pcie_readl_dbi(pci, cap_pos);
+
/*
* If the first cap at offset PCI_CFG_SPACE_SIZE is removed,
- * only set it's capid to zero as it cannot be skipped.
+ * only set its capid to zero as it cannot be skipped.
*/
if (cap_pos == PCI_CFG_SPACE_SIZE) {
dw_pcie_dbi_ro_wr_en(pci);
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
2026-01-22 7:45 [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Qiang Yu
2026-01-22 7:45 ` [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability() Qiang Yu
@ 2026-01-22 7:45 ` Qiang Yu
2026-01-22 8:15 ` Shawn Lin
2026-01-23 7:33 ` [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Manivannan Sadhasivam
2 siblings, 1 reply; 8+ messages in thread
From: Qiang Yu @ 2026-01-22 7:45 UTC (permalink / raw)
To: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas
Cc: linux-pci, linux-kernel, linux-arm-msm, Qiang Yu
The current "has_msi_ctrl" flag name is misleading because it suggests the
presence of any MSI controller, while it is specifically set for platforms
that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
device tree properties, indicating they rely on the iMSI-RX module for MSI
functionality.
Rename it to "uses_imsi_rx" to make the intent clear:
- When true: Platform uses the iMSI-RX module for MSI handling
- When false: Platform has other MSI controller support (ITS/MBI, custom
handlers)
No functional changes, only improves code readability and eliminates
naming confusion.
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++--------
drivers/pci/controller/dwc/pcie-designware.h | 2 +-
drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index a17833dd6f9d4b4aa06dc1fe09ffed5e2c28a82f..e7dbdf3670b426783e778be5064def10d2b209b1 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -255,7 +255,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp)
u64 msi_target = (u64)pp->msi_data;
u32 ctrl, num_ctrls;
- if (!pci_msi_enabled() || !pp->has_msi_ctrl)
+ if (!pci_msi_enabled() || !pp->uses_imsi_rx)
return;
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
@@ -603,15 +603,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
}
if (pci_msi_enabled()) {
- pp->has_msi_ctrl = !(pp->ops->msi_init ||
+ pp->uses_imsi_rx = !(pp->ops->msi_init ||
of_property_present(np, "msi-parent") ||
of_property_present(np, "msi-map"));
/*
- * For the has_msi_ctrl case the default assignment is handled
+ * For the uses_imsi_rx case the default assignment is handled
* in the dw_pcie_msi_host_init().
*/
- if (!pp->has_msi_ctrl && !pp->num_vectors) {
+ if (!pp->uses_imsi_rx && !pp->num_vectors) {
pp->num_vectors = MSI_DEF_NUM_VECTORS;
} else if (pp->num_vectors > MAX_MSI_IRQS) {
dev_err(dev, "Invalid number of vectors\n");
@@ -623,7 +623,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
ret = pp->ops->msi_init(pp);
if (ret < 0)
goto err_deinit_host;
- } else if (pp->has_msi_ctrl) {
+ } else if (pp->uses_imsi_rx) {
ret = dw_pcie_msi_host_init(pp);
if (ret < 0)
goto err_deinit_host;
@@ -701,7 +701,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
dw_pcie_edma_remove(pci);
err_free_msi:
- if (pp->has_msi_ctrl)
+ if (pp->uses_imsi_rx)
dw_pcie_free_msi(pp);
err_deinit_host:
@@ -729,7 +729,7 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
dw_pcie_edma_remove(pci);
- if (pp->has_msi_ctrl)
+ if (pp->uses_imsi_rx)
dw_pcie_free_msi(pp);
if (pp->ops->deinit)
@@ -1130,7 +1130,7 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
* the MSI and MSI-X capabilities of the Root Port to allow the drivers
* to fall back to INTx instead.
*/
- if (pp->has_msi_ctrl) {
+ if (pp->uses_imsi_rx) {
dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI);
dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);
}
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 53b65428fadb3d905b02bdcc06667065574f4f9d..33154bc89dd3b7d7fbe0ea749ca22bdc8292489c 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -416,7 +416,7 @@ struct dw_pcie_host_ops {
};
struct dw_pcie_rp {
- bool has_msi_ctrl:1;
+ bool uses_imsi_rx:1;
bool cfg0_io_shared:1;
u64 cfg0_base;
void __iomem *va_cfg0_base;
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 13e6c334e10d21b9ebfe5f82de0aff3bce6191e3..999f5e083cef4e78b85a0111d2a90c3de65c83b5 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1633,7 +1633,7 @@ static void qcom_pci_free_msi(void *ptr)
{
struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr;
- if (pp && pp->has_msi_ctrl)
+ if (pp && pp->uses_imsi_rx)
dw_pcie_free_msi(pp);
}
@@ -1657,7 +1657,7 @@ static int qcom_pcie_ecam_host_init(struct pci_config_window *cfg)
if (ret)
return ret;
- pp->has_msi_ctrl = true;
+ pp->uses_imsi_rx = true;
dw_pcie_msi_init(pp);
return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability()
2026-01-22 7:45 ` [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability() Qiang Yu
@ 2026-01-22 8:10 ` Shawn Lin
0 siblings, 0 replies; 8+ messages in thread
From: Shawn Lin @ 2026-01-22 8:10 UTC (permalink / raw)
To: Qiang Yu, Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas
Cc: shawn.lin, linux-pci, linux-kernel, linux-arm-msm
在 2026/01/22 星期四 15:45, Qiang Yu 写道:
> Fix a grammatical error in the comment by changing "it's" to "its". Also
> add a blank line after the variable declaration for better code
> formatting.
>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 2fa9f6ee149ed76ee84e8129a47f4bde2fa4d513..18331d9e85be30462277532afa71b5850438f32e 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -268,9 +268,10 @@ void dw_pcie_remove_ext_capability(struct dw_pcie *pci, u8 cap)
> return;
>
> header = dw_pcie_readl_dbi(pci, cap_pos);
> +
> /*
> * If the first cap at offset PCI_CFG_SPACE_SIZE is removed,
> - * only set it's capid to zero as it cannot be skipped.
> + * only set its capid to zero as it cannot be skipped.
> */
> if (cap_pos == PCI_CFG_SPACE_SIZE) {
> dw_pcie_dbi_ro_wr_en(pci);
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
2026-01-22 7:45 ` [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity Qiang Yu
@ 2026-01-22 8:15 ` Shawn Lin
2026-01-23 6:10 ` Qiang Yu
0 siblings, 1 reply; 8+ messages in thread
From: Shawn Lin @ 2026-01-22 8:15 UTC (permalink / raw)
To: Qiang Yu, Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas
Cc: shawn.lin, linux-pci, linux-kernel, linux-arm-msm
Hi Qiang,
在 2026/01/22 星期四 15:45, Qiang Yu 写道:
> The current "has_msi_ctrl" flag name is misleading because it suggests the
> presence of any MSI controller, while it is specifically set for platforms
> that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
> device tree properties, indicating they rely on the iMSI-RX module for MSI
> functionality.
>
> Rename it to "uses_imsi_rx" to make the intent clear:
> - When true: Platform uses the iMSI-RX module for MSI handling
> - When false: Platform has other MSI controller support (ITS/MBI, custom
> handlers)
>
> No functional changes, only improves code readability and eliminates
> naming confusion.
>
I love this patch, it's indeed confusing. But I noticed the naming
seems inconsistency, for instance, there are already use_atu_msg,
use_parent_dt_ranges, etc. Should we use use_imsi_rx instead?
But in any case,
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++--------
> drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index a17833dd6f9d4b4aa06dc1fe09ffed5e2c28a82f..e7dbdf3670b426783e778be5064def10d2b209b1 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -255,7 +255,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp)
> u64 msi_target = (u64)pp->msi_data;
> u32 ctrl, num_ctrls;
>
> - if (!pci_msi_enabled() || !pp->has_msi_ctrl)
> + if (!pci_msi_enabled() || !pp->uses_imsi_rx)
> return;
>
> num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
> @@ -603,15 +603,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> }
>
> if (pci_msi_enabled()) {
> - pp->has_msi_ctrl = !(pp->ops->msi_init ||
> + pp->uses_imsi_rx = !(pp->ops->msi_init ||
> of_property_present(np, "msi-parent") ||
> of_property_present(np, "msi-map"));
>
> /*
> - * For the has_msi_ctrl case the default assignment is handled
> + * For the uses_imsi_rx case the default assignment is handled
> * in the dw_pcie_msi_host_init().
> */
> - if (!pp->has_msi_ctrl && !pp->num_vectors) {
> + if (!pp->uses_imsi_rx && !pp->num_vectors) {
> pp->num_vectors = MSI_DEF_NUM_VECTORS;
> } else if (pp->num_vectors > MAX_MSI_IRQS) {
> dev_err(dev, "Invalid number of vectors\n");
> @@ -623,7 +623,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> ret = pp->ops->msi_init(pp);
> if (ret < 0)
> goto err_deinit_host;
> - } else if (pp->has_msi_ctrl) {
> + } else if (pp->uses_imsi_rx) {
> ret = dw_pcie_msi_host_init(pp);
> if (ret < 0)
> goto err_deinit_host;
> @@ -701,7 +701,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> dw_pcie_edma_remove(pci);
>
> err_free_msi:
> - if (pp->has_msi_ctrl)
> + if (pp->uses_imsi_rx)
> dw_pcie_free_msi(pp);
>
> err_deinit_host:
> @@ -729,7 +729,7 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
>
> dw_pcie_edma_remove(pci);
>
> - if (pp->has_msi_ctrl)
> + if (pp->uses_imsi_rx)
> dw_pcie_free_msi(pp);
>
> if (pp->ops->deinit)
> @@ -1130,7 +1130,7 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
> * the MSI and MSI-X capabilities of the Root Port to allow the drivers
> * to fall back to INTx instead.
> */
> - if (pp->has_msi_ctrl) {
> + if (pp->uses_imsi_rx) {
> dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI);
> dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);
> }
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 53b65428fadb3d905b02bdcc06667065574f4f9d..33154bc89dd3b7d7fbe0ea749ca22bdc8292489c 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -416,7 +416,7 @@ struct dw_pcie_host_ops {
> };
>
> struct dw_pcie_rp {
> - bool has_msi_ctrl:1;
> + bool uses_imsi_rx:1;
> bool cfg0_io_shared:1;
> u64 cfg0_base;
> void __iomem *va_cfg0_base;
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 13e6c334e10d21b9ebfe5f82de0aff3bce6191e3..999f5e083cef4e78b85a0111d2a90c3de65c83b5 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1633,7 +1633,7 @@ static void qcom_pci_free_msi(void *ptr)
> {
> struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr;
>
> - if (pp && pp->has_msi_ctrl)
> + if (pp && pp->uses_imsi_rx)
> dw_pcie_free_msi(pp);
> }
>
> @@ -1657,7 +1657,7 @@ static int qcom_pcie_ecam_host_init(struct pci_config_window *cfg)
> if (ret)
> return ret;
>
> - pp->has_msi_ctrl = true;
> + pp->uses_imsi_rx = true;
> dw_pcie_msi_init(pp);
>
> return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
2026-01-22 8:15 ` Shawn Lin
@ 2026-01-23 6:10 ` Qiang Yu
2026-01-23 7:34 ` Manivannan Sadhasivam
0 siblings, 1 reply; 8+ messages in thread
From: Qiang Yu @ 2026-01-23 6:10 UTC (permalink / raw)
To: Shawn Lin
Cc: Jingoo Han, Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, linux-pci,
linux-kernel, linux-arm-msm
On Thu, Jan 22, 2026 at 04:15:52PM +0800, Shawn Lin wrote:
> Hi Qiang,
>
> 在 2026/01/22 星期四 15:45, Qiang Yu 写道:
> > The current "has_msi_ctrl" flag name is misleading because it suggests the
> > presence of any MSI controller, while it is specifically set for platforms
> > that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
> > device tree properties, indicating they rely on the iMSI-RX module for MSI
> > functionality.
> >
> > Rename it to "uses_imsi_rx" to make the intent clear:
> > - When true: Platform uses the iMSI-RX module for MSI handling
> > - When false: Platform has other MSI controller support (ITS/MBI, custom
> > handlers)
> >
> > No functional changes, only improves code readability and eliminates
> > naming confusion.
> >
>
> I love this patch, it's indeed confusing. But I noticed the naming
> seems inconsistency, for instance, there are already use_atu_msg,
> use_parent_dt_ranges, etc. Should we use use_imsi_rx instead?
Thank you. You are right. Use_imsi_rx is more consistency.
- Qiang Yu
>
> But in any case,
> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
>
> > Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> > ---
> > drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++--------
> > drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> > drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
> > 3 files changed, 11 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index a17833dd6f9d4b4aa06dc1fe09ffed5e2c28a82f..e7dbdf3670b426783e778be5064def10d2b209b1 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -255,7 +255,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp)
> > u64 msi_target = (u64)pp->msi_data;
> > u32 ctrl, num_ctrls;
> > - if (!pci_msi_enabled() || !pp->has_msi_ctrl)
> > + if (!pci_msi_enabled() || !pp->uses_imsi_rx)
> > return;
> > num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
> > @@ -603,15 +603,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > }
> > if (pci_msi_enabled()) {
> > - pp->has_msi_ctrl = !(pp->ops->msi_init ||
> > + pp->uses_imsi_rx = !(pp->ops->msi_init ||
> > of_property_present(np, "msi-parent") ||
> > of_property_present(np, "msi-map"));
> > /*
> > - * For the has_msi_ctrl case the default assignment is handled
> > + * For the uses_imsi_rx case the default assignment is handled
> > * in the dw_pcie_msi_host_init().
> > */
> > - if (!pp->has_msi_ctrl && !pp->num_vectors) {
> > + if (!pp->uses_imsi_rx && !pp->num_vectors) {
> > pp->num_vectors = MSI_DEF_NUM_VECTORS;
> > } else if (pp->num_vectors > MAX_MSI_IRQS) {
> > dev_err(dev, "Invalid number of vectors\n");
> > @@ -623,7 +623,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > ret = pp->ops->msi_init(pp);
> > if (ret < 0)
> > goto err_deinit_host;
> > - } else if (pp->has_msi_ctrl) {
> > + } else if (pp->uses_imsi_rx) {
> > ret = dw_pcie_msi_host_init(pp);
> > if (ret < 0)
> > goto err_deinit_host;
> > @@ -701,7 +701,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > dw_pcie_edma_remove(pci);
> > err_free_msi:
> > - if (pp->has_msi_ctrl)
> > + if (pp->uses_imsi_rx)
> > dw_pcie_free_msi(pp);
> > err_deinit_host:
> > @@ -729,7 +729,7 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
> > dw_pcie_edma_remove(pci);
> > - if (pp->has_msi_ctrl)
> > + if (pp->uses_imsi_rx)
> > dw_pcie_free_msi(pp);
> > if (pp->ops->deinit)
> > @@ -1130,7 +1130,7 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
> > * the MSI and MSI-X capabilities of the Root Port to allow the drivers
> > * to fall back to INTx instead.
> > */
> > - if (pp->has_msi_ctrl) {
> > + if (pp->uses_imsi_rx) {
> > dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI);
> > dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);
> > }
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > index 53b65428fadb3d905b02bdcc06667065574f4f9d..33154bc89dd3b7d7fbe0ea749ca22bdc8292489c 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > @@ -416,7 +416,7 @@ struct dw_pcie_host_ops {
> > };
> > struct dw_pcie_rp {
> > - bool has_msi_ctrl:1;
> > + bool uses_imsi_rx:1;
> > bool cfg0_io_shared:1;
> > u64 cfg0_base;
> > void __iomem *va_cfg0_base;
> > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> > index 13e6c334e10d21b9ebfe5f82de0aff3bce6191e3..999f5e083cef4e78b85a0111d2a90c3de65c83b5 100644
> > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > @@ -1633,7 +1633,7 @@ static void qcom_pci_free_msi(void *ptr)
> > {
> > struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr;
> > - if (pp && pp->has_msi_ctrl)
> > + if (pp && pp->uses_imsi_rx)
> > dw_pcie_free_msi(pp);
> > }
> > @@ -1657,7 +1657,7 @@ static int qcom_pcie_ecam_host_init(struct pci_config_window *cfg)
> > if (ret)
> > return ret;
> > - pp->has_msi_ctrl = true;
> > + pp->uses_imsi_rx = true;
> > dw_pcie_msi_init(pp);
> > return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);
> >
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements
2026-01-22 7:45 [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Qiang Yu
2026-01-22 7:45 ` [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability() Qiang Yu
2026-01-22 7:45 ` [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity Qiang Yu
@ 2026-01-23 7:33 ` Manivannan Sadhasivam
2 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2026-01-23 7:33 UTC (permalink / raw)
To: Jingoo Han, Lorenzo Pieralisi, Krzysztof Wilczyński,
Rob Herring, Bjorn Helgaas, Qiang Yu
Cc: linux-pci, linux-kernel, linux-arm-msm
On Wed, 21 Jan 2026 23:45:17 -0800, Qiang Yu wrote:
> This series contains two cleanup patches for the PCI DWC subsystem that
> improve code readability and maintainability without any functional
> changes.
>
> The first patch addresses a naming issue where the "has_msi_ctrl" flag
> name was misleading. The flag specifically indicates when a platform uses
> the iMSI-RX module for MSI handling, rather than having any generic MSI
> controller. Renaming it to "uses_imsi_rx" makes the code's intent much
> clearer.
>
> [...]
Applied, thanks!
[1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability()
commit: 8a214f64554ce4da91f35e7d3b8eaa9674f5154d
[2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
commit: 0ecd890e3cf54a0586247b9a384702703277e4fd
Best regards,
--
Manivannan Sadhasivam <mani@kernel.org>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity
2026-01-23 6:10 ` Qiang Yu
@ 2026-01-23 7:34 ` Manivannan Sadhasivam
0 siblings, 0 replies; 8+ messages in thread
From: Manivannan Sadhasivam @ 2026-01-23 7:34 UTC (permalink / raw)
To: Qiang Yu
Cc: Shawn Lin, Jingoo Han, Lorenzo Pieralisi,
Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, linux-pci,
linux-kernel, linux-arm-msm
On Thu, Jan 22, 2026 at 10:10:34PM -0800, Qiang Yu wrote:
> On Thu, Jan 22, 2026 at 04:15:52PM +0800, Shawn Lin wrote:
> > Hi Qiang,
> >
> > 在 2026/01/22 星期四 15:45, Qiang Yu 写道:
> > > The current "has_msi_ctrl" flag name is misleading because it suggests the
> > > presence of any MSI controller, while it is specifically set for platforms
> > > that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
> > > device tree properties, indicating they rely on the iMSI-RX module for MSI
> > > functionality.
> > >
> > > Rename it to "uses_imsi_rx" to make the intent clear:
> > > - When true: Platform uses the iMSI-RX module for MSI handling
> > > - When false: Platform has other MSI controller support (ITS/MBI, custom
> > > handlers)
> > >
> > > No functional changes, only improves code readability and eliminates
> > > naming confusion.
> > >
> >
> > I love this patch, it's indeed confusing. But I noticed the naming
> > seems inconsistency, for instance, there are already use_atu_msg,
> > use_parent_dt_ranges, etc. Should we use use_imsi_rx instead?
>
> Thank you. You are right. Use_imsi_rx is more consistency.
>
Ammended this change while applying, thanks Shawn!
- Mani
> - Qiang Yu
> >
> > But in any case,
> > Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> >
> > > Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> > > ---
> > > drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++--------
> > > drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> > > drivers/pci/controller/dwc/pcie-qcom.c | 4 ++--
> > > 3 files changed, 11 insertions(+), 11 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index a17833dd6f9d4b4aa06dc1fe09ffed5e2c28a82f..e7dbdf3670b426783e778be5064def10d2b209b1 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -255,7 +255,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp)
> > > u64 msi_target = (u64)pp->msi_data;
> > > u32 ctrl, num_ctrls;
> > > - if (!pci_msi_enabled() || !pp->has_msi_ctrl)
> > > + if (!pci_msi_enabled() || !pp->uses_imsi_rx)
> > > return;
> > > num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
> > > @@ -603,15 +603,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > > }
> > > if (pci_msi_enabled()) {
> > > - pp->has_msi_ctrl = !(pp->ops->msi_init ||
> > > + pp->uses_imsi_rx = !(pp->ops->msi_init ||
> > > of_property_present(np, "msi-parent") ||
> > > of_property_present(np, "msi-map"));
> > > /*
> > > - * For the has_msi_ctrl case the default assignment is handled
> > > + * For the uses_imsi_rx case the default assignment is handled
> > > * in the dw_pcie_msi_host_init().
> > > */
> > > - if (!pp->has_msi_ctrl && !pp->num_vectors) {
> > > + if (!pp->uses_imsi_rx && !pp->num_vectors) {
> > > pp->num_vectors = MSI_DEF_NUM_VECTORS;
> > > } else if (pp->num_vectors > MAX_MSI_IRQS) {
> > > dev_err(dev, "Invalid number of vectors\n");
> > > @@ -623,7 +623,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > > ret = pp->ops->msi_init(pp);
> > > if (ret < 0)
> > > goto err_deinit_host;
> > > - } else if (pp->has_msi_ctrl) {
> > > + } else if (pp->uses_imsi_rx) {
> > > ret = dw_pcie_msi_host_init(pp);
> > > if (ret < 0)
> > > goto err_deinit_host;
> > > @@ -701,7 +701,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> > > dw_pcie_edma_remove(pci);
> > > err_free_msi:
> > > - if (pp->has_msi_ctrl)
> > > + if (pp->uses_imsi_rx)
> > > dw_pcie_free_msi(pp);
> > > err_deinit_host:
> > > @@ -729,7 +729,7 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
> > > dw_pcie_edma_remove(pci);
> > > - if (pp->has_msi_ctrl)
> > > + if (pp->uses_imsi_rx)
> > > dw_pcie_free_msi(pp);
> > > if (pp->ops->deinit)
> > > @@ -1130,7 +1130,7 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
> > > * the MSI and MSI-X capabilities of the Root Port to allow the drivers
> > > * to fall back to INTx instead.
> > > */
> > > - if (pp->has_msi_ctrl) {
> > > + if (pp->uses_imsi_rx) {
> > > dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI);
> > > dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);
> > > }
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > > index 53b65428fadb3d905b02bdcc06667065574f4f9d..33154bc89dd3b7d7fbe0ea749ca22bdc8292489c 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > > @@ -416,7 +416,7 @@ struct dw_pcie_host_ops {
> > > };
> > > struct dw_pcie_rp {
> > > - bool has_msi_ctrl:1;
> > > + bool uses_imsi_rx:1;
> > > bool cfg0_io_shared:1;
> > > u64 cfg0_base;
> > > void __iomem *va_cfg0_base;
> > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> > > index 13e6c334e10d21b9ebfe5f82de0aff3bce6191e3..999f5e083cef4e78b85a0111d2a90c3de65c83b5 100644
> > > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > > @@ -1633,7 +1633,7 @@ static void qcom_pci_free_msi(void *ptr)
> > > {
> > > struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr;
> > > - if (pp && pp->has_msi_ctrl)
> > > + if (pp && pp->uses_imsi_rx)
> > > dw_pcie_free_msi(pp);
> > > }
> > > @@ -1657,7 +1657,7 @@ static int qcom_pcie_ecam_host_init(struct pci_config_window *cfg)
> > > if (ret)
> > > return ret;
> > > - pp->has_msi_ctrl = true;
> > > + pp->uses_imsi_rx = true;
> > > dw_pcie_msi_init(pp);
> > > return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);
> > >
> >
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-01-23 7:34 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2026-01-22 7:45 [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Qiang Yu
2026-01-22 7:45 ` [PATCH 1/2] PCI: dwc: Fix grammar and formatting in dw_pcie_remove_ext_capability() Qiang Yu
2026-01-22 8:10 ` Shawn Lin
2026-01-22 7:45 ` [PATCH 2/2] PCI: dwc: Rename has_msi_ctrl to uses_imsi_rx for clarity Qiang Yu
2026-01-22 8:15 ` Shawn Lin
2026-01-23 6:10 ` Qiang Yu
2026-01-23 7:34 ` Manivannan Sadhasivam
2026-01-23 7:33 ` [PATCH 0/2] PCI: dwc: Code clean up and formatting improvements Manivannan Sadhasivam
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