Re: [PATCH 07/15] PCI/ASPM: Save L1SS state in the saved capability store

[sashiko-bot@kernel.org]

> Save and restore the L1 PM Substates control registers through the
> per-device saved capability store instead of a private pci_cap_saved_state
> buffer.
> 
> pci_restore_aspm_l1ss_state() needs both the Upstream and Downstream
> Port's saved L1SS configuration, and had to fetch two buffers and decode
> each by index. Read the saved values by configuration space offset
> instead, which names the register at every use. Add
> pci_read_saved_l1ss_ctl() to read one device's pair, so that the Port
> and the device below it are read the same way.
> 
> Reserve PCI_L1SS_CTL1 and PCI_L1SS_CTL2 with a single request, since
> they are adjacent DWORDs, just as the old code allocated one two-DWORD
> buffer for both. Skip the reservation entirely for devices without the
> capability, which the previous code could not do because it allocated
> the buffer through pci_add_ext_cap_save_buffer() before looking at
> pdev->l1ss.
> 
> No functional change intended.
> 
> Assisted-by: LLM
> Signed-off-by: David Matlack <dmatlack@google.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20260924173501.856380-1-dmatlack@google.com?part=7