[PATCH] PCI: Add quirk for ASPEED AST1150 bridge to prevent false RID aliasing

[PATCH] PCI: Add quirk for ASPEED AST1150 bridge to prevent false RID aliasing

[Nirmoy Das]

ASPEED BMC controllers have VGA and USB functions behind a PCIe-to-PCI
bridge that causes them to share the same stream ID:

  [e0]---00.0-[e1-e2]----00.0-[e2]--+-00.0  ASPEED Graphics Family
                                    \-02.0  ASPEED USB Controller

Both devices get stream ID 0x5e200 due to bridge aliasing, causing the
USB controller to be rejected with 'Aliasing StreamID unsupported'.

Per ASPEED, the AST1150 operates in PCI mode where downstream devices
generate their own distinct Requester IDs. Set
PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to stop false alias detection.

Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
---
 drivers/pci/quirks.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b9c252aa6fe0..a7a1bf4c4354 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4453,6 +4453,20 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9000,
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9084,
 				quirk_bridge_cavm_thrx2_pcie_root);
 
+/*
+ * ASPEED AST1150 is a PCIe-to-PCI bridge that operates in PCI mode (not PCI-X).
+ * Although it reports as a PCIe-to-PCI bridge, the downstream PCI bus does not
+ * perform conventional Requester ID aliasing - each device behind the bridge
+ * generates its own distinct Requester ID. This quirk stops false alias
+ * detection at the bridge, fixing IOMMU StreamID conflicts that break DMA for
+ * devices like the USB controller behind this bridge.
+ */
+static void quirk_aspeed_ast1150_bridge(struct pci_dev *pdev)
+{
+	pdev->dev_flags |= PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT;
+}
+DECLARE_PCI_FIXUP_HEADER(0x1a03, 0x1150, quirk_aspeed_ast1150_bridge);
+
 /*
  * Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero)
  * class code.  Fix it.
-- 
2.43.0

Re: [PATCH] PCI: Add quirk for ASPEED AST1150 bridge to prevent false RID aliasing

[Jason Gunthorpe]

On Wed, Dec 17, 2025 at 05:32:32AM -0800, Nirmoy Das wrote:
> ASPEED BMC controllers have VGA and USB functions behind a PCIe-to-PCI
> bridge that causes them to share the same stream ID:
> 
>   [e0]---00.0-[e1-e2]----00.0-[e2]--+-00.0  ASPEED Graphics Family
>                                     \-02.0  ASPEED USB Controller
> 
> Both devices get stream ID 0x5e200 due to bridge aliasing, causing the
> USB controller to be rejected with 'Aliasing StreamID unsupported'.
> 
> Per ASPEED, the AST1150 operates in PCI mode where downstream devices
> generate their own distinct Requester IDs. Set
> PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to stop false alias detection.

This isn't right

Per ASPEED the AST1150 always uses the RID of the downstream and never
replaces it with any other RID. There is no real PCI bus inside the
integrated device.

> Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
> ---
>  drivers/pci/quirks.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)

No, please add a new quirk. A downstream PCI device is never the root
of translation.

Jason

Re: [PATCH] PCI: Add quirk for ASPEED AST1150 bridge to prevent false RID aliasing

[Robin Murphy]

On 17/12/2025 1:32 pm, Nirmoy Das wrote:
> ASPEED BMC controllers have VGA and USB functions behind a PCIe-to-PCI
> bridge that causes them to share the same stream ID:
> 
>    [e0]---00.0-[e1-e2]----00.0-[e2]--+-00.0  ASPEED Graphics Family
>                                      \-02.0  ASPEED USB Controller
> 
> Both devices get stream ID 0x5e200 due to bridge aliasing, causing the
> USB controller to be rejected with 'Aliasing StreamID unsupported'.
> 
> Per ASPEED, the AST1150 operates in PCI mode where downstream devices
> generate their own distinct Requester IDs. Set
> PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to stop false alias detection.

I don't think that's really the right quirk - that one effectively means 
"RID aliasing upstream of this bridge is irrelevant", whereas what you 
want here is "RID aliasing *at* this bridge doesn't happen even though 
it looks like it could". With BRIDGE_XLATE_ROOT, I think if you then put 
this behind a contrived upstream chain of additional PCIe->PCI->PCIE 
bridges that *could* legitimately introduce further aliasing, it would 
give the wrong result.

Thanks,
Robin.

> Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
> ---
>   drivers/pci/quirks.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index b9c252aa6fe0..a7a1bf4c4354 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4453,6 +4453,20 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9000,
>   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9084,
>   				quirk_bridge_cavm_thrx2_pcie_root);
>   
> +/*
> + * ASPEED AST1150 is a PCIe-to-PCI bridge that operates in PCI mode (not PCI-X).
> + * Although it reports as a PCIe-to-PCI bridge, the downstream PCI bus does not
> + * perform conventional Requester ID aliasing - each device behind the bridge
> + * generates its own distinct Requester ID. This quirk stops false alias
> + * detection at the bridge, fixing IOMMU StreamID conflicts that break DMA for
> + * devices like the USB controller behind this bridge.
> + */
> +static void quirk_aspeed_ast1150_bridge(struct pci_dev *pdev)
> +{
> +	pdev->dev_flags |= PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT;
> +}
> +DECLARE_PCI_FIXUP_HEADER(0x1a03, 0x1150, quirk_aspeed_ast1150_bridge);
> +
>   /*
>    * Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero)
>    * class code.  Fix it.

Re: [PATCH] PCI: Add quirk for ASPEED AST1150 bridge to prevent false RID aliasing

[Nirmoy Das]

On 17.12.25 14:48, Robin Murphy wrote:
> On 17/12/2025 1:32 pm, Nirmoy Das wrote:
>> ASPEED BMC controllers have VGA and USB functions behind a PCIe-to-PCI
>> bridge that causes them to share the same stream ID:
>>
>>    [e0]---00.0-[e1-e2]----00.0-[e2]--+-00.0  ASPEED Graphics Family
>>                                      \-02.0  ASPEED USB Controller
>>
>> Both devices get stream ID 0x5e200 due to bridge aliasing, causing the
>> USB controller to be rejected with 'Aliasing StreamID unsupported'.
>>
>> Per ASPEED, the AST1150 operates in PCI mode where downstream devices
>> generate their own distinct Requester IDs. Set
>> PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT to stop false alias detection.
>
> I don't think that's really the right quirk - that one effectively 
> means "RID aliasing upstream of this bridge is irrelevant", whereas 
> what you want here is "RID aliasing *at* this bridge doesn't happen 
> even though it looks like it could". With BRIDGE_XLATE_ROOT, I think 
> if you then put this behind a contrived upstream chain of additional 
> PCIe->PCI->PCIE bridges that *could* legitimately introduce further 
> aliasing, it would give the wrong result.

Thanks Robin. You're right - I'll send a v2 using the a new 
PCI_DEV_FLAGS_PCI_BRIDGE_NO_ALIASES quirk Jason suggested, which 
correctly handles only aliasing at this bridge.


>
> Thanks,
> Robin.
>
>> Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
>> ---
>>   drivers/pci/quirks.c | 14 ++++++++++++++
>>   1 file changed, 14 insertions(+)
>>
>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
>> index b9c252aa6fe0..a7a1bf4c4354 100644
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
>> @@ -4453,6 +4453,20 @@ 
>> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9000,
>>   DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9084,
>>                   quirk_bridge_cavm_thrx2_pcie_root);
>>   +/*
>> + * ASPEED AST1150 is a PCIe-to-PCI bridge that operates in PCI mode 
>> (not PCI-X).
>> + * Although it reports as a PCIe-to-PCI bridge, the downstream PCI 
>> bus does not
>> + * perform conventional Requester ID aliasing - each device behind 
>> the bridge
>> + * generates its own distinct Requester ID. This quirk stops false 
>> alias
>> + * detection at the bridge, fixing IOMMU StreamID conflicts that 
>> break DMA for
>> + * devices like the USB controller behind this bridge.
>> + */
>> +static void quirk_aspeed_ast1150_bridge(struct pci_dev *pdev)
>> +{
>> +    pdev->dev_flags |= PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT;
>> +}
>> +DECLARE_PCI_FIXUP_HEADER(0x1a03, 0x1150, quirk_aspeed_ast1150_bridge);
>> +
>>   /*
>>    * Intersil/Techwell TW686[4589]-based video capture cards have an 
>> empty (zero)
>>    * class code.  Fix it.
>