From: Mario Limonciello <mario.limonciello@amd.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Hans de Goede" <hdegoede@redhat.com>,
iain@orangesquash.org.uk,
"Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>,
"open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: Re: [PATCH v20 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers
Date: Mon, 2 Oct 2023 11:27:35 -0500 [thread overview]
Message-ID: <3b151040-1345-4cd5-ab94-a6ef89762ed9@amd.com> (raw)
In-Reply-To: <20230930092423.GA6605@wunner.de>
On 9/30/2023 04:24, Lukas Wunner wrote:
> On Tue, Sep 19, 2023 at 10:27:24PM -0500, Mario Limonciello wrote:
>> --- a/drivers/pci/quirks.c
>> +++ b/drivers/pci/quirks.c
> [...]
>> + * When AMD PCIe root ports with AMD USB4 controllers attached to them are put
>> + * into D3hot or D3cold downstream USB devices may fail to wakeup the system
>> + * from suspend to idle. This manifests as a missing wakeup interrupt.
>> + *
>> + * Prevent the associated root port from using PME to wake from D3hot or
>> + * D3cold power states during suspend.
>> + * This will effectively put the root port into D0 power state over suspend.
>
> IIUC, the quirk matches for a Root Port, then searches for a
> USB controller below the Root Port, and if found, searches for the
> Root Port above again to clear or reinstate the PME bits.
>
> That seems like a roundabout way of doing things. Have you
> considered matching for the USB controller's Device ID in the quirk,
> then checking whether the Root Port above has the Device ID which
> is known to be broken?
>
Yeah; this suggestion works. It's 8 quirks instead of 4, but it's much
cleaner and easier to follow. I will send a v21 with this later on.
> Also, since pci_d3cold_enable() / pci_d3cold_disable() are now fixed
> (can no longer be interfered with from user space), you might want to
> consider using them alternatively to clearing PME bits. They don't
> require access to config space.
>
I still don't like that userspace can potentially influence state
selection policy. Separate from this quirk I'm going to send another
patch for that.
prev parent reply other threads:[~2023-10-02 16:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 3:27 [PATCH v20 0/2] Add quirk for PCIe root port on AMD systems Mario Limonciello
2023-09-20 3:27 ` [PATCH v20 1/2] PCI: Move the `PCI_CLASS_SERIAL_USB_USB4` definition to common header Mario Limonciello
2023-09-20 3:27 ` [PATCH v20 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers Mario Limonciello
2023-09-25 5:20 ` Mika Westerberg
2023-09-27 18:40 ` Mario Limonciello
2023-09-29 19:44 ` Bjorn Helgaas
2023-09-30 2:05 ` Mario Limonciello
2023-10-03 17:09 ` Bjorn Helgaas
2023-09-30 9:24 ` Lukas Wunner
2023-10-02 16:27 ` Mario Limonciello [this message]
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