Re: [PATCH v2] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Marek Vasut <marek.vasut@mailbox.org>]

On 9/19/25 2:33 PM, Manivannan Sadhasivam wrote:

Hello Manivannan,

>>> Because it is the controller driver which can determine whether or not the
>>> controller is in HSC domain based on its compatible string, add the missing
>>> delay into the controller driver.
>>>
>>> This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
>>> whether S4 is affected as well. This patch does apply the extra delay on
>>> R-Car S4 as well.
>>
> 
> What are the implications of not having the delay? Just asking to determine if
> this patch is a stable candidate or not.

Observable, thus far, none. However, the current behavior does not 
follow the reference manual operations chart, so I think this should be 
in stable, else the hardware is operated out of specification.

>> [...]
>>> -	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc))
>>> +	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc)) {
>>>   		reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
>>> +		fsleep(1000);
>>> +	}
>>
>> Would it be a prudent thing to do here to add a comment over the fsleep()
>> or over the if-statement to document briefly (and for posterity) why we
>> sleep here?
>>
> 
> I can add the quote to the reference manual while applying.
I'll send a V3 with a comment shortly.