Re: [PATCH v6 3/9] cxl: Add reset-idle and cache flush helpers

["Dan Williams (nvidia)" <djbw@kernel.org>]

[ cc Robert ]

Srirangan Madhavan wrote:
> Add helpers to collect the CXL regions affected by a memdev reset,
> verify that those regions are idle, and invalidate CPU caches for the
> affected address ranges before reset.
> 
> A memdev can participate in an interleaved region through multiple
> endpoint decoders. Track affected regions in a temporary xarray so each
> region is checked and cache-invalidated once per reset operation.

With the new proposal we still have the HPA range per-endpoint decoder,
so you can still check that the endpoint decoder is not mapped via
request_region().

Probably the more important optimization is to enumerate to CXL when the
cache invalidation routine is global. That lets the reset implementation
do its own simple "one global cache operation per-device" rather than
per-decoder.

Now, thinking through this, recall that some AMD platforms need firmware
help to translate the decoder settings from per-host-bridge normalized
addressing to typical global HPA addressing. See cxl_prm_setup_root().

I think for now HDM restore can not be expected to work on those platforms.
Either need to cache the translation at init, or teach the restore path to
reverse translate SPA back to the HW decoder HPA values.