[PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Marek Vasut]

R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
domain, after reset has been asserted by writing a matching reset bit into
register SRCR, it is mandatory to wait 1ms.

Because it is the controller driver which can determine whether or not the
controller is in HSC domain based on its compatible string, add the missing
delay into the controller driver.

This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
whether S4 is affected as well. This patch does apply the extra delay on
R-Car S4 as well.

Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode")
Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: "Krzysztof Wilczyński" <kwilczynski@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Manivannan Sadhasivam <mani@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org
---
V2: Use fsleep() instead of usleep_range()
V3: Add comment over the fsleep() clarifying its purpose
---
 drivers/pci/controller/dwc/pcie-rcar-gen4.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
index de9fe2ed2423d..365dff6fe7f8f 100644
--- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c
+++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c
@@ -182,8 +182,16 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar)
 		return ret;
 	}
 
-	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc))
+	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc)) {
 		reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
+		/*
+		 * R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
+		 * Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
+		 * domain, after reset has been asserted by writing a matching reset bit into
+		 * register SRCR, it is mandatory to wait 1ms.
+		 */
+		fsleep(1000);
+	}
 
 	val = readl(rcar->base + PCIEMSR0);
 	if (rcar->drvdata->mode == DW_PCIE_RC_TYPE) {
-- 
2.51.0

Re: [PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Krzysztof Wilczyński]

Hello,

[...]
> Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode")
> Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Missed a tag from me. :)  But we can add it when applying, no worries.

> -	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc))
> +	if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc)) {
>  		reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc);
> +		/*
> +		 * R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
> +		 * Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
> +		 * domain, after reset has been asserted by writing a matching reset bit into
> +		 * register SRCR, it is mandatory to wait 1ms.
> +		 */
> +		fsleep(1000);

Thank you!

	Krzysztof

Re: [PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Marek Vasut]

On 9/19/25 4:13 PM, Krzysztof Wilczyński wrote:
> Hello,

Hello Krzysztof,

> [...]
>> Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode")
>> Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> 
> Missed a tag from me. :)  But we can add it when applying, no worries.
Sorry, and thank you.

Re: [PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Manivannan Sadhasivam]

On Fri, Sep 19, 2025 at 11:13:40PM +0900, Krzysztof Wilczyński wrote:
> Hello,
> 
> [...]
> > Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode")
> > Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
> > Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> 
> Missed a tag from me. :)  But we can add it when applying, no worries.
> 

I've added your tag while applying:
https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=controller/rcar-gen4&id=23291403391180b0312405bb3d8fa8546124c643

Thanks, Krzysztof!

- Mani

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Geert Uytterhoeven]

On Fri, 19 Sept 2025 at 15:47, Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
> R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
> Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
> domain, after reset has been asserted by writing a matching reset bit into
> register SRCR, it is mandatory to wait 1ms.
>
> Because it is the controller driver which can determine whether or not the
> controller is in HSC domain based on its compatible string, add the missing
> delay into the controller driver.
>
> This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
> whether S4 is affected as well. This patch does apply the extra delay on
> R-Car S4 as well.
>
> Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode")
> Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion

[Manivannan Sadhasivam]

On Fri, 19 Sep 2025 15:45:58 +0200, Marek Vasut wrote:
> R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
> Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
> domain, after reset has been asserted by writing a matching reset bit into
> register SRCR, it is mandatory to wait 1ms.
> 
> Because it is the controller driver which can determine whether or not the
> controller is in HSC domain based on its compatible string, add the missing
> delay into the controller driver.
> 
> [...]

Applied, thanks!

[1/1] PCI: rcar-gen4: Add missing 1ms delay after PWR reset assertion
      commit: 23291403391180b0312405bb3d8fa8546124c643

Best regards,
-- 
Manivannan Sadhasivam <mani@kernel.org>