From: Lukas Wunner <lukas@wunner.de>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
dan.j.williams@intel.com, ira.weiny@intel.com,
vishal.l.verma@intel.com, alison.schofield@intel.com,
Jonathan.Cameron@huawei.com, dave@stgolabs.net,
bhelgaas@google.com
Subject: Re: [PATCH v3 2/4] PCI: Add check for CXL Secondary Bus Reset
Date: Wed, 3 Apr 2024 10:26:40 +0200 [thread overview]
Message-ID: <Zg0SwGmelNpY__5f@wunner.de> (raw)
In-Reply-To: <20240402234848.3287160-3-dave.jiang@intel.com>
On Tue, Apr 02, 2024 at 04:45:30PM -0700, Dave Jiang wrote:
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4927,10 +4927,55 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, bool probe)
> return pci_reset_hotplug_slot(dev->slot->hotplug, probe);
> }
>
> +static int cxl_port_dvsec(struct pci_dev *dev)
> +{
> + return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_CXL,
> + PCI_DVSEC_CXL_PORT);
> +}
Hm, seems a bit odd that this returns an int even though
pci_find_dvsec_capability() returns a u16 and all the callers
of cxl_port_dvsec() seem to assign the return value to a u16
as well. Is the "int" on purpose?
Thanks,
Lukas
next prev parent reply other threads:[~2024-04-03 8:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-02 23:45 [PATCH 0/4 v3] PCI: Add Secondary Bus Reset (SBR) support for CXL Dave Jiang
2024-04-02 23:45 ` [PATCH v3 1/4] PCI/cxl: Move PCI CXL vendor Id to a common location from CXL subsystem Dave Jiang
2024-04-02 23:45 ` [PATCH v3 2/4] PCI: Add check for CXL Secondary Bus Reset Dave Jiang
2024-04-03 8:26 ` Lukas Wunner [this message]
2024-04-04 0:19 ` Dave Jiang
2024-04-03 15:01 ` Jonathan Cameron
2024-04-02 23:45 ` [PATCH v3 3/4] PCI: Create new reset method to force SBR for CXL Dave Jiang
2024-04-03 15:09 ` Jonathan Cameron
2024-04-04 0:21 ` Dave Jiang
2024-04-04 13:29 ` Jonathan Cameron
2024-04-04 14:42 ` Dan Williams
2024-04-02 23:45 ` [PATCH v3 4/4] cxl: Add post reset warning if reset is detected as Secondary Bus Reset (SBR) Dave Jiang
2024-04-03 15:32 ` Jonathan Cameron
2024-04-03 16:27 ` Dan Williams
2024-04-04 13:16 ` Jonathan Cameron
2024-04-04 8:51 ` Lukas Wunner
2024-04-04 13:13 ` Jonathan Cameron
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