Linux PCI subsystem development
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* [PATCH] samples: rust: fix endianness issue in rust_driver_pci
@ 2025-11-01 21:46 Marko Turk
  2025-11-12  8:45 ` Marko Turk
  0 siblings, 1 reply; 11+ messages in thread
From: Marko Turk @ 2025-11-01 21:46 UTC (permalink / raw)
  To: dakr, bhelgaas, kwilczynski, linux-pci, linux-kernel, mt
  Cc: linux-pci, linux-kernel, Marko Turk

QEMU PCI test device specifies all registers as little endian. OFFSET
register is converted properly, but the COUNT register is not.

Apply the same conversion to the COUNT register also.

Signed-off-by: Marko Turk <mt@markoturk.info>
Fixes: 685376d18e9a ("samples: rust: add Rust PCI sample driver")
---
 samples/rust/rust_driver_pci.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs
index 55a683c39ed9..3cbb3139fbcf 100644
--- a/samples/rust/rust_driver_pci.rs
+++ b/samples/rust/rust_driver_pci.rs
@@ -56,7 +56,7 @@ fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> {
         // Note that we need `try_write8`, since `offset` can't be checked at compile-time.
         bar.try_write8(data, offset)?;
 
-        Ok(bar.read32(Regs::COUNT))
+        Ok(u32::from_le(bar.read32(Regs::COUNT)))
     }
 }
 
-- 
2.51.0


^ permalink raw reply related	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2025-11-13  8:36 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-01 21:46 [PATCH] samples: rust: fix endianness issue in rust_driver_pci Marko Turk
2025-11-12  8:45 ` Marko Turk
2025-11-12  9:37   ` Miguel Ojeda
2025-11-12  9:56     ` Miguel Ojeda
2025-11-13  8:22       ` Danilo Krummrich
2025-11-13  8:27         ` Miguel Ojeda
2025-11-13  8:36         ` Danilo Krummrich
2025-11-12 10:16     ` Dirk Behme
2025-11-12 10:24       ` Marko Turk
2025-11-12 10:24       ` Miguel Ojeda
2025-11-13  5:48         ` Dirk Behme

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