From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
"Joerg Roedel" <joro@8bytes.org>,
Bjorn Helgaas <bhelgaas@google.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
"Pranjal Shrivastava" <praan@google.com>,
Mostafa Saleh <smostafa@google.com>,
Lu Baolu <baolu.lu@linux.intel.com>,
Kevin Tian <kevin.tian@intel.com>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <vsethi@nvidia.com>,
Shuai Xue <xueshuai@linux.alibaba.com>
Subject: Re: [PATCH v5 02/18] PCI/CXL: Probe the underlying bus reset in cxl_reset_bus_function()
Date: Thu, 27 Aug 2026 20:47:41 -0700 [thread overview]
Message-ID: <apEE3RDpSVNECSoX@nvidia.com> (raw)
In-Reply-To: <20260828000051.GA3922654@nvidia.com>
On Thu, Aug 27, 2026 at 09:00:51PM -0300, Jason Gunthorpe wrote:
> On Thu, Aug 27, 2026 at 01:49:05PM -0700, Nicolin Chen wrote:
> > On Thu, Aug 27, 2026 at 05:31:31PM -0300, Jason Gunthorpe wrote:
> > > > [ ... 27 lines skipped ... ]
> > > > @@ -4979,8 +4979,16 @@ static int cxl_reset_bus_function(struct pci_dev *dev, bool probe)
> > > > if (!dvsec)
> > > > return -ENOTTY;
> > > >
> > > > - if (probe)
> > > > - return 0;
> > > > + /*
> > > > + * Do not probe via pci_reset_bus_function(), which would reject a
> > > > + * masked SBR that the do-reset path below unmasks before resetting.
> > > > + */
> > > > + if (probe) {
> > > > + rc = pci_dev_reset_slot_function(dev, PCI_RESET_PROBE);
> > > > + if (rc != -ENOTTY)
> > > > + return rc;
> > > > + return pci_parent_bus_reset(dev, PCI_RESET_PROBE);
> > > > + }
> > >
> > > Why not put this a little lower after the:
> > >
> > > >
> > > > rc = pci_read_config_word(bridge, dvsec + PCI_DVSEC_CXL_PORT_CTL, ®);
> > > > if (rc)
> > >
> > > ?
> >
> > Hmm, the "if (probe)" was checked before pci_read_config_word, so I
> > kept it there. I don't quite get the reason of putting it behind.
> >
> > Mind elaborating?
>
> I'm looking at the ENOTTY:
>
> rc = pci_read_config_word(bridge, dvsec + PCI_DVSEC_CXL_PORT_CTL, ®);
> if (rc)
> return -ENOTTY;
>
> If the general point with these fixes was probe should capture all the
> ENOTTY cases under probe there should not be an ENOTTY return outside
> probe.
>
> So maybe that should be ENODEV, or maybe probe should check it. I'm
> not really sure how config read can fail, so maybe ENODEV is the right
> direction
I think returning -ENOTTY is somewhat correct here.
-ENOTTY has two slightly different meanings in the PCI reset layer:
1. This reset method does not support the device, try next method
2. This reset method failed, but no actual HW reset was asserted
Either 1 or 2 seems a fit for this case, although worth mentioning
for 1, changing to -ENODEV doesn't change the behavior for now, as
cxl_reset_bus_function is the last function in the method[] array.
But it will be different once some new method is appended to the
reset array.
On the other hand, I see the probe-passing reset functions define:
* @probe: if true, return 0 if the device can be reset this way.
And read failure can say that the device cannot be reset this way.
So, though part of me still lean towards leaving it as-is, I think
moving is probably the conservative correct thing here. It aligns
the probe path closer to the !probe path by a harmless read.
Thanks
Nicolin
next prev parent reply other threads:[~2026-08-28 3:48 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 4:06 [PATCH v5 00/18] iommu/arm-smmu-v3: Quarantine device upon ATC invalidation timeout Nicolin Chen
2026-07-03 4:06 ` [PATCH v5 01/18] PCI: Don't suspend IOMMU when probing reset capability Nicolin Chen
2026-07-03 4:27 ` sashiko-bot
2026-08-27 20:31 ` Jason Gunthorpe
2026-07-03 4:06 ` [PATCH v5 02/18] PCI/CXL: Probe the underlying bus reset in cxl_reset_bus_function() Nicolin Chen
2026-07-03 4:29 ` sashiko-bot
2026-08-27 20:31 ` Jason Gunthorpe
2026-08-27 20:49 ` Nicolin Chen
2026-08-28 0:00 ` Jason Gunthorpe
2026-08-28 3:47 ` Nicolin Chen [this message]
2026-07-03 4:06 ` [PATCH v5 03/18] PCI: Propagate FLR return values to callers Nicolin Chen
2026-07-03 4:25 ` sashiko-bot
2026-08-27 20:31 ` Jason Gunthorpe
2026-08-27 21:18 ` Nicolin Chen
2026-08-28 0:02 ` Jason Gunthorpe
2026-08-28 3:57 ` Nicolin Chen
2026-07-03 4:06 ` [PATCH v5 04/18] iommu: Convert gdev->blocked from bool to enum gdev_blocked Nicolin Chen
2026-07-03 4:24 ` sashiko-bot
2026-07-13 11:33 ` Baolu Lu
2026-07-13 18:25 ` Nicolin Chen
2026-08-27 20:31 ` Jason Gunthorpe
2026-07-03 4:06 ` [PATCH v5 05/18] iommu: Pass in reset result to pci_dev_reset_iommu_done() Nicolin Chen
2026-07-03 4:27 ` sashiko-bot
2026-07-13 11:48 ` Baolu Lu
2026-07-13 18:32 ` Nicolin Chen
2026-07-14 5:36 ` Baolu Lu
2026-07-03 4:06 ` [PATCH v5 06/18] iommu/arm-smmu-v3: Don't rb_erase() a never-inserted stream node Nicolin Chen
2026-07-03 4:25 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 07/18] iommu/arm-smmu-v3: Mark ATC invalidate timeouts via lockless bitmap Nicolin Chen
2026-07-03 4:26 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 08/18] iommu/arm-smmu-v3: Skip remaining GERROR causes on SFM Nicolin Chen
2026-07-03 4:29 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 09/18] iommu/arm-smmu-v3: Introduce per-cmdq cmdq_err_handler callback Nicolin Chen
2026-07-03 4:32 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 10/18] iommu/arm-smmu-v3: Recheck CMDQ_ERR in tegra241_vintf0_handle_error() Nicolin Chen
2026-07-03 4:40 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 11/18] iommu/arm-smmu-v3: Co-clear pending CMDQ_ERR when CMD_SYNC times out Nicolin Chen
2026-07-03 4:39 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 12/18] iommu/arm-smmu-v3: Introduce arm_smmu_cmdq_batch_issue() wrapper Nicolin Chen
2026-07-03 4:22 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 13/18] iommu/arm-smmu-v3: Add streams_lock for atomic-context SID->master lookup Nicolin Chen
2026-07-03 4:26 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 14/18] iommu/arm-smmu-v3: Add has_ats to struct arm_smmu_cmdq_batch Nicolin Chen
2026-07-03 4:29 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 15/18] iommu/arm-smmu-v3: Add INV_TYPE_ATS_BROKEN to skip quarantined ATS masters Nicolin Chen
2026-07-03 4:34 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 16/18] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions Nicolin Chen
2026-07-03 4:29 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 17/18] iommu/arm-smmu-v3: Thread arm_smmu_master_domain on a per-master list Nicolin Chen
2026-07-03 4:32 ` sashiko-bot
2026-07-03 4:06 ` [PATCH v5 18/18] iommu/arm-smmu-v3: Block ATS for a master upon an ATC invalidation timeout Nicolin Chen
2026-07-03 4:36 ` sashiko-bot
2026-07-13 12:20 ` Baolu Lu
2026-07-13 18:50 ` Nicolin Chen
2026-07-14 5:46 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=apEE3RDpSVNECSoX@nvidia.com \
--to=nicolinc@nvidia.com \
--cc=baolu.lu@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=praan@google.com \
--cc=rafael@kernel.org \
--cc=robin.murphy@arm.com \
--cc=smostafa@google.com \
--cc=vsethi@nvidia.com \
--cc=will@kernel.org \
--cc=xueshuai@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox