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From: "Bowman, Terry" <terry.bowman@amd.com>
To: Gregory Price <gourry@gourry.net>
Cc: dave@stgolabs.net, jonathan.cameron@huawei.com,
	dave.jiang@intel.com, alison.schofield@intel.com,
	dan.j.williams@intel.com, bhelgaas@google.com,
	shiju.jose@huawei.com, ming.li@zohomail.com,
	Smita.KoralahalliChannabasappa@amd.com, rrichter@amd.com,
	dan.carpenter@linaro.org, PradeepVineshReddy.Kodamati@amd.com,
	lukas@wunner.de, Benjamin.Cheatham@amd.com,
	sathyanarayanan.kuppuswamy@linux.intel.com,
	linux-cxl@vger.kernel.org, alucerop@amd.com, ira.weiny@intel.com,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v11 23/23] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup
Date: Thu, 11 Sep 2025 15:19:23 -0500	[thread overview]
Message-ID: <c05ac8ce-044c-4cbe-8c97-846e473324df@amd.com> (raw)
In-Reply-To: <aMGUMACDTT5a2-XA@gourry-fedora-PF4VCD3F>



On 9/10/2025 10:07 AM, Gregory Price wrote:
> Hi Terry,
>
> On Tue, Aug 26, 2025 at 08:35:38PM -0500, Terry Bowman wrote:
>> Introduce cxl_mask_proto_interrupts() to call pci_aer_mask_internal_errors().
>> Add calls to cxl_mask_proto_interrupts() within CXL Port teardown for CXL
>> Root Ports, CXL Downstream Switch Ports, CXL Upstream Switch Ports, and CXL
>> Endpoints. Follow the same "bottom-up" approach used during CXL Port
>> teardown.
>>
> ...
>> @@ -1471,6 +1475,8 @@ static void cxl_detach_ep(void *data)
>>  {
>>  	struct cxl_memdev *cxlmd = data;
>>  
>> +	cxl_mask_proto_interrupts(cxlmd->cxlds->dev);
>> +
>>  	for (int i = cxlmd->depth - 1; i >= 1; i--) {
>>  		struct cxl_port *port, *parent_port;
>>  		struct detach_ctx ctx = {
> While testing v10 of this patch set, we found ourselves with a deadlock
> on boot with the following stack in the hung task:
>
> [  252.784440]  <TASK>
> [  252.789090]  schedule+0x5d6/0x1670
> [  252.796629]  ? schedule_preempt_disabled+0xa/0x10
> [  252.807061]  schedule_preempt_disabled+0xa/0x10
> [  252.817108]  __mutex_lock+0x245/0x7b0
> [  252.825229]  cxl_mask_proto_interrupts+0x23/0x50
> [  252.835470]  cxl_detach_ep+0x25/0x2e0
>
> This occurs on a system which fails to probe ports fully due to the
> duplicate id error resolved by the Delayed HB patch set.  
>
> But it's concerning that there's a deadlock condition without that
> patch set. Can you help try to eyeball this?  I'm trying to get more
> debug info, but testing system availability is limited.
>
> ~Gregory
>
Hi Greg,

Thanks for pointing out. We saw this too and is reason the device lock was removed from 
v11's cxl_mask_proto_interrupts(). Looks like I need to force the EP detach. Do you have 
steps for recreating the duplicate port id ? 

Terry

  reply	other threads:[~2025-09-11 20:19 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-27  1:35 [PATCH v11 00/23] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2025-08-27  1:35 ` [PATCH v11 01/23] cxl: Remove ifdef blocks of CONFIG_PCIEAER_CXL from core/pci.c Terry Bowman
2025-08-27  1:35 ` [PATCH v11 02/23] CXL/AER: Remove CONFIG_PCIEAER_CXL and replace with CONFIG_CXL_RAS Terry Bowman
2025-08-29 15:24   ` Jonathan Cameron
2025-08-29 18:16   ` Sathyanarayanan Kuppuswamy
2025-08-27  1:35 ` [PATCH v11 03/23] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions Terry Bowman
2025-08-28 15:28   ` Dave Jiang
2025-08-27  1:35 ` [PATCH v11 04/23] cxl/pci: Remove unnecessary CXL RCH " Terry Bowman
2025-08-28  8:35   ` Alejandro Lucero Palau
2025-08-28 17:32   ` Dave Jiang
2025-08-27  1:35 ` [PATCH v11 05/23] cxl: Move CXL driver RCH error handling into CONFIG_CXL_RCH_RAS conditional block Terry Bowman
2025-08-28  8:57   ` Alejandro Lucero Palau
2025-09-10 16:43     ` Bowman, Terry
2025-08-29 15:33   ` Jonathan Cameron
2025-09-11 17:48     ` Bowman, Terry
2025-09-11 19:41       ` Dave Jiang
2025-09-15 13:32         ` Bowman, Terry
2025-08-27  1:35 ` [PATCH v11 06/23] CXL/AER: Introduce rch_aer.c into AER driver for handling CXL RCH errors Terry Bowman
2025-08-28 20:53   ` Dave Jiang
2025-08-29  8:39     ` Lukas Wunner
2025-09-10 17:01       ` Bowman, Terry
2025-09-10 17:26         ` Dave Jiang
2025-09-12 13:59       ` Bowman, Terry
2025-09-12 19:09         ` Lukas Wunner
2025-09-10 16:56     ` Bowman, Terry
2025-09-10 12:43   ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 07/23] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h Terry Bowman
2025-08-27 14:51   ` Lukas Wunner
2025-08-29 15:42     ` Jonathan Cameron
2025-08-29 15:47     ` Jonathan Cameron
2025-08-28 21:07   ` Dave Jiang
2025-09-10 18:11     ` Bowman, Terry
2025-09-10 20:06       ` Dave Jiang
2025-08-27  1:35 ` [PATCH v11 08/23] PCI/CXL: Introduce pcie_is_cxl() Terry Bowman
2025-08-28  8:18   ` Alejandro Lucero Palau
2025-09-10 16:24     ` Bowman, Terry
2025-09-11  3:48       ` Lukas Wunner
2025-09-10 13:10   ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 09/23] PCI/AER: Report CXL or PCIe bus error type in trace logging Terry Bowman
2025-08-27  7:37   ` Lukas Wunner
2025-09-10 15:26     ` Bowman, Terry
2025-09-10 15:33       ` Lukas Wunner
2025-09-11  5:07   ` Lukas Wunner
2025-08-27  1:35 ` [PATCH v11 10/23] CXL/AER: Update PCI class code check to use FIELD_GET() Terry Bowman
2025-08-29 16:03   ` Jonathan Cameron
2025-09-11 18:18     ` Bowman, Terry
2025-08-27  1:35 ` [PATCH v11 11/23] cxl/pci: Update RAS handler interfaces to also support CXL Ports Terry Bowman
2025-08-27  1:35 ` [PATCH v11 12/23] cxl/pci: Log message if RAS registers are unmapped Terry Bowman
2025-08-27  1:35 ` [PATCH v11 13/23] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports Terry Bowman
2025-08-27 11:55   ` Shiju Jose
2025-08-29 16:06     ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 14/23] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors Terry Bowman
2025-08-27  1:35 ` [PATCH v11 15/23] cxl/pci: Map CXL Endpoint Port and CXL Switch Port RAS registers Terry Bowman
2025-08-28 23:05   ` Dave Jiang
2025-09-10 18:40     ` Bowman, Terry
2025-08-27  1:35 ` [PATCH v11 16/23] cxl/pci: Introduce CXL Endpoint protocol error handlers Terry Bowman
2025-08-27  7:48   ` Lukas Wunner
2025-09-10 13:23   ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 17/23] CXL/AER: Introduce cxl_aer.c into AER driver for forwarding CXL errors Terry Bowman
2025-08-27  7:56   ` Lukas Wunner
2025-08-27  1:35 ` [PATCH v11 18/23] PCI/AER: Dequeue forwarded CXL error Terry Bowman
2025-08-29  0:43   ` Dave Jiang
2025-08-29  7:10     ` Lukas Wunner
2025-09-16 15:18       ` Bowman, Terry
2025-09-11 14:33     ` Bowman, Terry
2025-09-11 15:41       ` Dave Jiang
2025-09-11 16:47         ` Bowman, Terry
2025-09-11 19:45           ` Dave Jiang
2025-09-10 13:29   ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 19/23] CXL/PCI: Introduce CXL Port protocol error handlers Terry Bowman
2025-08-30  0:17   ` Dave Jiang
2025-08-27  1:35 ` [PATCH v11 20/23] CXL/PCI: Export and rename merge_result() to pci_ers_merge_result() Terry Bowman
2025-08-27  8:04   ` Lukas Wunner
2025-09-10 15:57     ` Bowman, Terry
2025-09-11  3:44       ` Lukas Wunner
2025-08-27 12:19   ` kernel test robot
2025-08-27  1:35 ` [PATCH v11 21/23] CXL/PCI: Introduce CXL uncorrectable protocol error recovery Terry Bowman
2025-09-03 22:30   ` Dave Jiang
2025-09-11 19:19     ` Bowman, Terry
2025-09-11 19:48       ` Dave Jiang
2025-09-10 13:33   ` Jonathan Cameron
2025-08-27  1:35 ` [PATCH v11 22/23] CXL/PCI: Enable CXL protocol errors during CXL Port probe Terry Bowman
2025-09-03 23:23   ` Dave Jiang
2025-08-27  1:35 ` [PATCH v11 23/23] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup Terry Bowman
2025-09-10 15:07   ` Gregory Price
2025-09-11 20:19     ` Bowman, Terry [this message]
2025-08-29  0:07 ` [PATCH v11 00/23] Enable CXL PCIe Port Protocol Error handling and logging Dave Jiang
2025-09-23  3:29 ` Gregory Price
2025-09-23  9:21   ` Srinivasulu Thanneeru

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