* [PATCH 0/2] perf: Order SPE and TRBE padding before publishing AUX head
@ 2026-10-15 15:51 Leo Yan
2026-10-15 15:51 ` [PATCH 1/2] perf: arm_spe: Order " Leo Yan
2026-10-15 15:51 ` [PATCH 2/2] coresight: trbe: " Leo Yan
0 siblings, 2 replies; 5+ messages in thread
From: Leo Yan @ 2026-10-15 15:51 UTC (permalink / raw)
To: Will Deacon, Mark Rutland, Suzuki K Poulose, Mike Leach,
James Clark, Alexander Shishkin, Anshuman Khandual,
Mathieu Poirier
Cc: linux-arm-kernel, linux-perf-users, linux-kernel, coresight,
Leo Yan
SPE and TRBE write padding into their AUX buffers before advancing
aux_head. Add the missing write barriers so that a userspace reader on
another CPU cannot observe the new head before the padding stores
become visible.
AUX producers must make their data visible before publishing aux_head.
The required synchronization depends on the trace hardware and CPU
memory model, so the barriers belong in the drivers rather than in
perf_aux_output_skip() or perf_aux_output_end(). The TRBE change also
covers padding inserted by the overwrite erratum workaround before
perf_aux_output_end().
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
Leo Yan (2):
perf: arm_spe: Order padding before publishing AUX head
coresight: trbe: Order padding before publishing AUX head
drivers/hwtracing/coresight/coresight-trbe.c | 2 ++
drivers/perf/arm_spe_pmu.c | 5 ++++-
2 files changed, 6 insertions(+), 1 deletion(-)
---
base-commit: 0fcb05b72344f40806cbe810de8872f1698bf053
change-id: 20261015-add_barriers_for_perf_aux_output_skip-70356815b2bd
Best regards,
--
Leo Yan <leo.yan@arm.com>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] perf: arm_spe: Order padding before publishing AUX head
2026-10-15 15:51 [PATCH 0/2] perf: Order SPE and TRBE padding before publishing AUX head Leo Yan
@ 2026-10-15 15:51 ` Leo Yan
2026-10-15 16:03 ` sashiko-bot
2026-10-15 15:51 ` [PATCH 2/2] coresight: trbe: " Leo Yan
1 sibling, 1 reply; 5+ messages in thread
From: Leo Yan @ 2026-10-15 15:51 UTC (permalink / raw)
To: Will Deacon, Mark Rutland, Suzuki K Poulose, Mike Leach,
James Clark, Alexander Shishkin, Anshuman Khandual,
Mathieu Poirier
Cc: linux-arm-kernel, linux-perf-users, linux-kernel, coresight,
Leo Yan
The driver fills alignment gaps and calls perf_aux_output_skip(), which
publishes the new aux_head without a memory barrier. A userspace
consumer on another CPU can therefore observe the new head before the
padding stores become visible.
Add smp_wmb() between the padding stores and perf_aux_output_skip().
Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension")
Assisted-by: LLM
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
drivers/perf/arm_spe_pmu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index b70f3fedf0282baba1395ce1116272ec5f961ea8..e105462ec5f38eab4776b0a654ba7c8a84f70f71 100644
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -487,8 +487,11 @@ static void arm_spe_pmu_pad_buf(struct perf_output_handle *handle, int len)
u64 head = PERF_IDX2OFF(handle->head, buf);
memset(buf->base + head, ARM_SPE_BUF_PAD_BYTE, len);
- if (!buf->snapshot)
+ if (!buf->snapshot) {
+ /* Order the padding stores before publishing the new aux_head. */
+ smp_wmb();
perf_aux_output_skip(handle, len);
+ }
}
static u64 arm_spe_pmu_next_snapshot_off(struct perf_output_handle *handle)
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] coresight: trbe: Order padding before publishing AUX head
2026-10-15 15:51 [PATCH 0/2] perf: Order SPE and TRBE padding before publishing AUX head Leo Yan
2026-10-15 15:51 ` [PATCH 1/2] perf: arm_spe: Order " Leo Yan
@ 2026-10-15 15:51 ` Leo Yan
2026-10-15 16:09 ` sashiko-bot
1 sibling, 1 reply; 5+ messages in thread
From: Leo Yan @ 2026-10-15 15:51 UTC (permalink / raw)
To: Will Deacon, Mark Rutland, Suzuki K Poulose, Mike Leach,
James Clark, Alexander Shishkin, Anshuman Khandual,
Mathieu Poirier
Cc: linux-arm-kernel, linux-perf-users, linux-kernel, coresight,
Leo Yan
TRBE fills gaps in the AUX buffer before advancing aux_head. Neither
perf_aux_output_skip() nor perf_aux_output_end() guarantees ordering of
these CPU stores before publishing the new head.
Add smp_wmb() after memset() in __trbe_pad_buf(). This covers alignment
padding published by perf_aux_output_skip() and the overwrite erratum
padding written by trbe_get_trace_size() before perf_aux_output_end().
Fixes: 3fbf7f011f24 ("coresight: sink: Add TRBE driver")
Assisted-by: LLM
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
drivers/hwtracing/coresight/coresight-trbe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index c7cbca45f2debd4047b93283ea9fe5dd9e1f2ebf..b605121b1dcfed9837c15cd92ff4c42515f39eaf 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -362,6 +362,8 @@ static void trbe_stop_and_truncate_event(struct perf_output_handle *handle)
static void __trbe_pad_buf(struct trbe_buf *buf, u64 offset, int len)
{
memset((void *)buf->trbe_base + offset, ETE_IGNORE_PACKET, len);
+ /* Order the padding stores before publishing the new aux_head. */
+ smp_wmb();
}
static void trbe_pad_buf(struct perf_output_handle *handle, int len)
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] perf: arm_spe: Order padding before publishing AUX head
2026-10-15 15:51 ` [PATCH 1/2] perf: arm_spe: Order " Leo Yan
@ 2026-10-15 16:03 ` sashiko-bot
0 siblings, 0 replies; 5+ messages in thread
From: sashiko-bot @ 2026-10-15 16:03 UTC (permalink / raw)
To: Leo Yan; +Cc: linux-perf-users
> The driver fills alignment gaps and calls perf_aux_output_skip(), which
> publishes the new aux_head without a memory barrier. A userspace
> consumer on another CPU can therefore observe the new head before the
> padding stores become visible.
>
> Add smp_wmb() between the padding stores and perf_aux_output_skip().
>
> Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension")
> Assisted-by: LLM
> Signed-off-by: Leo Yan <leo.yan@arm.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261015-add_barriers_for_perf_aux_output_skip-v1-0-5847d0578859@arm.com?part=1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] coresight: trbe: Order padding before publishing AUX head
2026-10-15 15:51 ` [PATCH 2/2] coresight: trbe: " Leo Yan
@ 2026-10-15 16:09 ` sashiko-bot
0 siblings, 0 replies; 5+ messages in thread
From: sashiko-bot @ 2026-10-15 16:09 UTC (permalink / raw)
To: Leo Yan; +Cc: linux-perf-users
> TRBE fills gaps in the AUX buffer before advancing aux_head. Neither
> perf_aux_output_skip() nor perf_aux_output_end() guarantees ordering of
> these CPU stores before publishing the new head.
>
> Add smp_wmb() after memset() in __trbe_pad_buf(). This covers alignment
> padding published by perf_aux_output_skip() and the overwrite erratum
> padding written by trbe_get_trace_size() before perf_aux_output_end().
>
> Fixes: 3fbf7f011f24 ("coresight: sink: Add TRBE driver")
> Assisted-by: LLM
> Signed-off-by: Leo Yan <leo.yan@arm.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261015-add_barriers_for_perf_aux_output_skip-v1-0-5847d0578859@arm.com?part=2
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-10-15 16:09 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-10-15 15:51 [PATCH 0/2] perf: Order SPE and TRBE padding before publishing AUX head Leo Yan
2026-10-15 15:51 ` [PATCH 1/2] perf: arm_spe: Order " Leo Yan
2026-10-15 16:03 ` sashiko-bot
2026-10-15 15:51 ` [PATCH 2/2] coresight: trbe: " Leo Yan
2026-10-15 16:09 ` sashiko-bot
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox