From: sashiko-bot@kernel.org
To: "Florian Fainelli" <f.fainelli@gmail.com>
Cc: "open list:PERFORMANCE EVENTS SUBSYSTEM"
<linux-perf-users@vger.kernel.org>
Subject: Re: [PATCH v2 2/3] MIPS: perf: Add SB1 userspace callchain unwinding
Date: Fri, 13 Nov 2026 23:47:01 +0000 [thread overview]
Message-ID: <sashiko-outbox-213874@kernel.org> (raw)
In-Reply-To: <20261113233358.538698-3-f.fainelli@gmail.com>
> Restore the userspace callchain capability formerly available through
> MIPS OProfile, exposing it through perf for SB1 and SB1A. Commit
> 5f307491f3a0 ("MIPS: oprofile: Add callgraph support") introduced an
> in-kernel userspace prologue scanner, which disappeared with the removal
> of MIPS OProfile support in e258958945c6 ("arch: mips: Remove CONFIG_OPROFILE
> support"). The MIPS perf userspace callchain hook remained unimplemented.
>
> Follow the former OProfile approach of examining instructions before the
> sampled PC to find standard MIPS stack adjustments and saved return
> addresses. Bound each scan to 128 instructions, use nofault user reads,
> validate frame data and stack progress, and stop at the perf stack limit.
> Handle o32, n32 and n64 address widths and the actual sw/sd return-address
> slot widths, rather than relying on the kernel's unsigned long size.
> Allow the sampled leaf to use the live return-address register, and permit
> repeated return PCs when the stack advances so recursion is not truncated.
> [ ... ]
> types retain their existing userspace callchain behavior. Nonstandard
> prologues, dynamic stack adjustments and signal trampolines can truncate
> chains.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261113233358.538698-1-f.fainelli@gmail.com?part=2
next prev parent reply other threads:[~2026-11-13 23:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 23:33 [PATCH v2 0/3] MIPS: SiByte: Add HW PMU support Florian Fainelli
2026-11-13 23:33 ` [PATCH v2 1/3] MIPS: SiByte: Wire up the CPU interrupt controller Florian Fainelli
2026-11-13 23:53 ` sashiko-bot
2026-11-13 23:33 ` [PATCH v2 2/3] MIPS: perf: Add SB1 userspace callchain unwinding Florian Fainelli
2026-11-13 23:47 ` sashiko-bot [this message]
2026-11-13 23:33 ` [PATCH v2 3/3] MIPS: perf: Add SB1 and SB1A performance counter support Florian Fainelli
2026-11-13 23:54 ` sashiko-bot
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