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From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, neil.armstrong@linaro.org,
	vkoul@kernel.org, linux-phy@lists.infradead.org,
	linux-pci@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org,
	olteanv@gmail.com
Subject: Re: [PATCH v4 5/6] phy: qcom: qmp-pcie: Refactor common multiphy handling
Date: Mon, 21 Sep 2026 05:48:38 +0000	[thread overview]
Message-ID: <20260921054838.BB7201F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260921-nord-v4-5-ed05c6e09240@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] devres: UAF of parent-allocated qmp in child's devres action
--

commit 959cd8885f7d94827203cfb4fa89bce224f75fb7
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

phy: qcom: qmp-pcie: Refactor common multiphy handling

Refactors the multiphy handling to reuse port resource arrays and attach
power domains to individual PHY devices instead of the parent device. It
also validates the clock-output-names property count.

> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-multiphy.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-multiphy.c
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-multiphy.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-multiphy.c
[ ... ]
> @@ -398,45 +386,39 @@ static const struct phy_ops qmp_pcie_phy_ops = {
>  static void qmp_pcie_pd_detach(void *data)
>  {
>  	struct qmp_pcie *qmp = data;
> -	const struct qmp_phy_cfg *cfg = qmp->cfg;
>  	int i;
>  
> -	for (i = 0; i < cfg->num_pds; i++) {
> +	for (i = 0; i < qmp->cfg->num_pds; i++) {
>  		if (!IS_ERR_OR_NULL(qmp->pd_devs[i]))
>  			dev_pm_domain_detach(qmp->pd_devs[i], true);
>  	}
>  }
>  
> -static int qmp_pcie_pd_init(struct qmp_pcie *qmp)
> +static int qmp_pcie_pd_init(struct qmp_pcie *qmp, struct phy *phy)
>  {
>  	const struct qmp_phy_cfg *cfg = qmp->cfg;
> -	struct device *dev = qmp->dev;
> +	struct device *pd_dev = &phy->dev;
>  	int i, ret;
>  
>  	if (!cfg->num_pds)
>  		return 0;
>  
> -	qmp->pd_devs = devm_kcalloc(dev, cfg->num_pds, sizeof(*qmp->pd_devs),
> +	qmp->pd_devs = devm_kcalloc(pd_dev, cfg->num_pds, sizeof(*qmp->pd_devs),
>  				    GFP_KERNEL);
>  	if (!qmp->pd_devs)
>  		return -ENOMEM;
>  
> +	ret = devm_add_action_or_reset(pd_dev, qmp_pcie_pd_detach, qmp);

[Severity: High]
Can this code introduce a use-after-free regression during device unbind?

The qmp structure is allocated via devm_kcalloc() and tied to the parent
platform device's devres (qmp->dev) in qmp_pcie_multiphy_probe().
However, the cleanup action qmp_pcie_pd_detach() is now added to the child
PHY device's devres (pd_dev = &phy->dev).

If the parent device is unbound while a consumer holds a reference to the
PHY (e.g., via phy_get()), the parent's devres executes first and frees
the qmp array.

When the consumer later releases the PHY, the child PHY device's devres
executes, calling qmp_pcie_pd_detach() on the already freed qmp pointer.
This would lead to a use-after-free when accessing qmp->cfg->num_pds.

> +	if (ret)
> +		return ret;
> +
>  	for (i = 0; i < cfg->num_pds; i++) {
> -		qmp->pd_devs[i] = dev_pm_domain_attach_by_name(dev,
> -							       cfg->pd_names[i]);
> -		if (IS_ERR_OR_NULL(qmp->pd_devs[i])) {
> -			ret = PTR_ERR(qmp->pd_devs[i]) ? : -ENODATA;
> -			goto err_detach;
> -		}
> +		qmp->pd_devs[i] = dev_pm_domain_attach_by_name(pd_dev, cfg->pd_names[i]);
> +		if (IS_ERR_OR_NULL(qmp->pd_devs[i]))
> +			return PTR_ERR_OR_ZERO(qmp->pd_devs[i]) ? : -ENODATA;
>  	}
>  
> -	return devm_add_action_or_reset(dev, qmp_pcie_pd_detach, qmp);
> -
> -err_detach:
> -	while (--i >= 0)
> -		dev_pm_domain_detach(qmp->pd_devs[i], false);
> -
> -	return ret;
> +	return 0;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260921-nord-v4-0-ed05c6e09240@oss.qualcomm.com?part=5

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2026-09-21  5:48 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-21  5:37 [PATCH v4 0/6] Add PCIe support for Qualcomm Nord platform Krishna Chaitanya Chundru
2026-09-21  5:37 ` [PATCH v4 1/6] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding Krishna Chaitanya Chundru
2026-09-21  5:43   ` sashiko-bot
2026-09-24 13:22   ` Krzysztof Kozlowski
2026-09-25  4:08     ` Krishna Chaitanya Chundru
2026-09-25  6:28       ` Krzysztof Kozlowski
2026-09-25  6:36   ` Krzysztof Kozlowski
2026-09-21  5:37 ` [PATCH v4 2/6] dt-bindings: pci: qcom: add Nord PCIe controller compatible Krishna Chaitanya Chundru
2026-09-21  5:42   ` sashiko-bot
2026-09-21  5:37 ` [PATCH v4 3/6] PCI: qcom: Add Nord PCIe controller support Krishna Chaitanya Chundru
2026-09-21  5:46   ` sashiko-bot
2026-09-21  5:37 ` [PATCH v4 4/6] phy: qcom: qmp: Move qphy_setbits/clrbits/checkbits to common header Krishna Chaitanya Chundru
2026-09-21  5:42   ` sashiko-bot
2026-09-21  5:37 ` [PATCH v4 5/6] phy: qcom: qmp-pcie: Refactor common multiphy handling Krishna Chaitanya Chundru
2026-09-21  5:48   ` sashiko-bot [this message]
2026-09-22  8:12   ` Shawn Guo
2026-09-25 15:23   ` Manivannan Sadhasivam
2026-09-21  5:37 ` [PATCH v4 6/6] phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support Krishna Chaitanya Chundru
2026-09-21  5:58   ` sashiko-bot
2026-09-22  8:12   ` Shawn Guo
2026-09-25 15:25   ` Manivannan Sadhasivam
2026-09-21  6:30 ` [PATCH v4 0/6] Add PCIe support for Qualcomm Nord platform Qiang Yu
2026-09-21  7:37   ` Konrad Dybcio
2026-09-22  9:18     ` Qiang Yu
2026-09-22  8:13 ` Shawn Guo
2026-10-03  9:36 ` (subset) " Vinod Koul

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