Re: [PATCH 4/5] arm64: dts: qcom: qcs8300: enable pcie0 for QCS8300

From: Tingwei Zhang <quic_tingweiz@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Ziyue Zhang <quic_ziyuzhan@quicinc.com>, <vkoul@kernel.org>,
	<kishon@kernel.org>, <robh+dt@kernel.org>,
	<manivannan.sadhasivam@linaro.org>, <bhelgaas@google.com>,
	<kw@linux.com>, <lpieralisi@kernel.org>,
	<quic_qianyu@quicinc.com>, <conor+dt@kernel.org>,
	<neil.armstrong@linaro.org>, <andersson@kernel.org>,
	<konradybcio@kernel.org>, <quic_shashim@quicinc.com>,
	<quic_kaushalk@quicinc.com>, <quic_tdas@quicinc.com>,
	<quic_aiquny@quicinc.com>, <kernel@quicinc.com>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>
Subject: Re: [PATCH 4/5] arm64: dts: qcom: qcs8300: enable pcie0 for QCS8300
Date: Fri, 15 Nov 2024 14:42:47 +0800	[thread overview]
Message-ID: <bb6ae010-5dbf-455c-a53c-6c0e688f0ebc@quicinc.com> (raw)
In-Reply-To: <cp2g6j43zlx2njou5qz5tmwsnnzahqtk2hsxkj2ftrzbcmy742@ysca5ica4mvr>

On 11/15/2024 2:26 PM, Dmitry Baryshkov wrote:
> On Fri, Nov 15, 2024 at 12:59:12PM +0800, Tingwei Zhang wrote:
>> On 11/14/2024 9:03 PM, Konrad Dybcio wrote:
>>> On 14.11.2024 1:10 PM, Dmitry Baryshkov wrote:
>>>> On Thu, Nov 14, 2024 at 05:54:08PM +0800, Ziyue Zhang wrote:
>>>>> Add configurations in devicetree for PCIe0, including registers, clocks,
>>>>> interrupts and phy setting sequence.
>>>>>
>>>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/qcs8300-ride.dts |  44 +++++-
>>>>>    arch/arm64/boot/dts/qcom/qcs8300.dtsi     | 176 ++++++++++++++++++++++
>>>>>    2 files changed, 219 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
>>>>> index 7eed19a694c3..9d7c8555ed38 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
>>>>> +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
>>>>> @@ -213,7 +213,7 @@ vreg_l9c: ldo9 {
>>>>>    &gcc {
>>>>
>>>> The patch doesn't seem to update the gcc node in qcs8300.dtsi. Is there
>>>> any reason to have the clocks property in the board data file?
>>>
>>> Definitely not. Ziyue, please move that change to the soc dtsi
>>
>> Gcc node is updated in board device tree due to sleep_clk is defined in
>> board device tree. Sleep_clk is from PMIC instead SoC so we were requested
>> to move sleep_clk to board device tree in previous review [1].
> 
> Note, the review doesn't talk about sleep_clk at all. The recent
> examples (sm8650, x1e80100, sa8775p) still pull the clocks into the SoC
> dtsi, but without the freq.
> 
It's begining of the discussion of the PMIC clock for SoC. Sleep clock 
specific discussion is here [2].
[2]https://lore.kernel.org/all/be8b573c-db4e-4eec-a9a6-3cd83d04156d@kernel.org/
>>
>> [1]https://lore.kernel.org/all/10914199-1e86-4a2e-aec8-2a48cc49ef14@kernel.org/
>>>
>>> Konrad
>>
>>
>> -- 
>> Thanks,
>> Tingwei
>>
>> -- 
>> linux-phy mailing list
>> linux-phy@lists.infradead.org
>> https://lists.infradead.org/mailman/listinfo/linux-phy
> 


-- 
Thanks,
Tingwei

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