From: Qiang Yu <quic_qianyu@quicinc.com>
To: Johan Hovold <johan@kernel.org>
Cc: <manivannan.sadhasivam@linaro.org>, <vkoul@kernel.org>,
<kishon@kernel.org>, <robh@kernel.org>, <andersson@kernel.org>,
<konradybcio@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <abel.vesa@linaro.org>,
<quic_msarkar@quicinc.com>, <quic_devipriy@quicinc.com>,
<dmitry.baryshkov@linaro.org>, <kw@linux.com>,
<lpieralisi@kernel.org>, <neil.armstrong@linaro.org>,
<linux-arm-msm@vger.kernel.org>, <linux-phy@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<johan+linaro@kernel.org>
Subject: Re: [PATCH v8 5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100
Date: Wed, 13 Nov 2024 11:15:35 +0800 [thread overview]
Message-ID: <ef37236d-8856-4981-82fa-c0194d7b3dfc@quicinc.com> (raw)
In-Reply-To: <ZzOQi0PpRZYts-B0@hovoldconsulting.com>
On 11/13/2024 1:29 AM, Johan Hovold wrote:
> On Mon, Nov 11, 2024 at 11:44:17AM +0800, Qiang Yu wrote:
>> On 11/5/2024 1:28 PM, Qiang Yu wrote:
>>> On 11/4/2024 10:35 PM, Johan Hovold wrote:
>>>> On Thu, Oct 31, 2024 at 08:09:02PM -0700, Qiang Yu wrote:
>>>>> + ranges = <0x01000000 0x0 0x00000000 0x0 0x78200000 0x0
>>>>> 0x100000>,
>>>>> + <0x02000000 0x0 0x78300000 0x0 0x78300000 0x0
>>>>> 0x3d00000>,
>>>> Can you double check the size here so that it is indeed correct and not
>>>> just copied from the other nodes which initially got it wrong:
>>>>
>>>> https://lore.kernel.org/lkml/20240710-topic-barman-v1-1-5f63fca8d0fc@linaro.org/
>> BTW, regions of PCIe6a, PCIe4, PCIe5 are 64MB, 32MB, 32MB, respectively.
>> Why range size is set to 0x1d00000 for PCIe6a, any issue is reported on
>> PCIe6a?
> Thanks for checking. It seems the patch linked to above was broken for
> PCIe6a then.
>
> We did see PCIe5 probe breaking due to the overlap with PCIe4 but the
> patch predates PCIe5 support being posted and merged so it was probably
> just based on inspection.
>
> Could you send a fix for PCIe6a?
Sure, will send the fix.
Thanks,
Qiang Yu
>
> Johan
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next prev parent reply other threads:[~2024-11-13 3:15 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-01 3:08 [PATCH v8 0/5] Add support for PCIe3 on x1e80100 Qiang Yu
2024-11-01 3:08 ` [PATCH v8 1/5] dt-bindings: PCI: qcom: Move OPP table to qcom,pcie-common.yaml Qiang Yu
2024-11-01 3:08 ` [PATCH v8 2/5] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt Qiang Yu
2024-11-01 3:09 ` [PATCH v8 3/5] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC Qiang Yu
2024-11-04 14:24 ` Johan Hovold
2024-11-04 14:57 ` Krzysztof Wilczyński
2024-11-01 3:09 ` [PATCH v8 4/5] PCI: qcom: Disable ASPM L0s for X1E80100 Qiang Yu
2024-11-04 14:29 ` Johan Hovold
2024-11-04 14:59 ` Krzysztof Wilczyński
2024-11-01 3:09 ` [PATCH v8 5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-11-04 14:35 ` Johan Hovold
2024-11-05 5:28 ` Qiang Yu
2024-11-11 3:44 ` Qiang Yu
2024-11-12 17:29 ` Johan Hovold
2024-11-13 3:15 ` Qiang Yu [this message]
2024-11-14 15:25 ` Konrad Dybcio
2024-11-03 21:04 ` [PATCH v8 0/5] " Krzysztof Wilczyński
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