From: sashiko-bot@kernel.org
To: "George Neacsu" <geocausa@gmail.com>
Cc: linux-phy@lists.infradead.org, media-ci@linuxtv.org,
vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com
Subject: Re: [PATCH RFC v2 1/4] phy: Add MIPI C-PHY mode and configuration options
Date: Fri, 16 Oct 2026 11:04:52 +0000 [thread overview]
Message-ID: <sashiko-outbox-174230@kernel.org> (raw)
In-Reply-To: <20261016-x1e-cphy-rfc-v2-1-377654253193@gmail.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] phy: use of non-standard integer types in struct phy_configure_opts_mipi_cphy
--
commit d9667cf3e3ee5fb3d84322cb2fefa2dae78c9e33
Author: George Neacsu <geocausa@gmail.com>
phy: Add MIPI C-PHY mode and configuration options
This commit introduces PHY_MODE_MIPI_CPHY and a new structure, struct
phy_configure_opts_mipi_cphy, to the generic PHY framework. This allows
CSI-2 receivers to specify the symbol rate and number of trios for C-PHYs.
> diff --git a/include/linux/phy/phy-mipi-cphy.h b/include/linux/phy/phy-mipi-cphy.h
> new file mode 100644
> index 0000000000000..ef6af61ded254
> --- /dev/null
> +++ b/include/linux/phy/phy-mipi-cphy.h
> @@ -0,0 +1,27 @@
[ ... ]
> +struct phy_configure_opts_mipi_cphy {
> + /**
> + * @symbol_rate:
> + *
> + * Symbol rate on each trio, in symbols per second.
> + */
> + unsigned long long symbol_rate;
[Severity: Low]
This isn't a bug, but would it be better to use explicitly-sized types like u64
here instead of unsigned long long?
> +
> + /**
> + * @trios:
> + *
> + * Number of active trios.
> + */
> + unsigned char trios;
[Severity: Low]
Similarly, would it be better to use u8 here instead of unsigned char?
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-x1e-cphy-rfc-v2-0-377654253193@gmail.com?part=1
--
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next prev parent reply other threads:[~2026-10-16 11:04 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <K9h_NQSPlrzzoVDIqqNPGT6KDZNScVi2mlqy6yNs8VOOS_I4KXf0QLy4k3Cwo2qKhnfL_qUK5wnY4h6wX24L4A==@protonmail.internalid>
2026-10-16 10:57 ` [PATCH RFC v2 0/4] phy: qcom-mipi-csi2: C-PHY for X1E80100 George Neacsu via B4 Relay
2026-10-16 10:57 ` [PATCH RFC v2 1/4] phy: Add MIPI C-PHY mode and configuration options George Neacsu via B4 Relay
2026-10-16 11:04 ` sashiko-bot [this message]
2026-10-16 11:35 ` Nihal Kumar Gupta
2026-10-16 14:16 ` Loic Poulain
2026-10-16 10:57 ` [PATCH RFC v2 2/4] phy: Add MIPI C-PHY configuration helpers George Neacsu via B4 Relay
2026-10-16 11:06 ` Bryan O'Donoghue
2026-10-16 10:57 ` [PATCH RFC v2 3/4] phy: qcom-mipi-csi2: Rename the D-PHY init sequence George Neacsu via B4 Relay
2026-10-16 11:07 ` Bryan O'Donoghue
2026-10-16 10:57 ` [PATCH RFC v2 4/4] phy: qcom-mipi-csi2: Add C-PHY support for X1E80100 George Neacsu via B4 Relay
2026-10-16 11:15 ` Bryan O'Donoghue
2026-10-16 11:35 ` Nihal Kumar Gupta
2026-10-16 12:05 ` Konrad Dybcio
2026-10-16 12:25 ` Nihal Kumar Gupta
2026-10-16 12:24 ` David Heidelberg
2026-10-16 11:02 ` [PATCH RFC v2 0/4] phy: qcom-mipi-csi2: C-PHY " Bryan O'Donoghue
2026-10-16 11:32 ` George Neacsu
2026-10-16 13:27 ` Bryan O'Donoghue
2026-10-16 14:55 ` George Neacsu
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